Functional description

AN1330

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Figure 6.

Oscillator circuit block diagram

2.4

Current protection

The L5970D has two types of current limit protection: pulse-by-pulse and frequency

foldback.

The schematic of the current limitation circuitry for the pulse-by-pulse protection is shown in

Figure 7. The output power PDMOS transistor is split into two parallel PDMOS transistors.

switched off until the next falling edge of the internal clock pulse. Due to this reduction of the

ON time, the output voltage decreases. Since the minimum switch ON time (necessary to

avoid a false overcurrent signal) is too short to obtain a sufficiently low duty cycle at 250

kHz, the output current, in strong overcurrent or short circuit conditions, could increase

again. For this reason the switching frequency is also reduced, thus keeping the inductor

current under its maximum threshold. The Frequency Shifter (Figure 6) functions based on

the feedback voltage. As the feedback voltage decreases (due to the reduced duty cycle),

the switching frequency decreases also.

Figure 7.

Current limitation circuitry

2.5

Error amplifier

The voltage error amplifier is the core of the loop regulation. It is a transconductance

operational amplifier whose non inverting input is connected to the internal voltage

FREQUENCY

SHIFTER

CLOCK

GENERATOR

RAMP

GENERATOR

SYNCHRONIZATOR

CLOCK

RAMP

Ibias_osc

SYNC

t

AM00007v1

FREQUENCY

SHIFTER

CLOCK

GENERATOR

RAMP

GENERATOR

SYNCHRONIZER

DRIVER

NOT

A1

PWM

VCC

OUT

A1/A2=95

RSENSE

AM00008v1

I

I

RTH

A2