AN2839 datasheet(10/40 Pages) STMICROELECTRONICS

10 / 40 page

Designing an application with L6228

AN2839

10/40

Doc ID 15104 Rev 1

where Ipk is the peak value of the load current.

Using multiple resistors in parallel will help obtain the required power rating with standard

resistors and reduce the inductance.

The RSENSE tolerance reflects on the peak current error: 1% resistors should be preferred.

Table 1 shows the recommended values for RSENSE (to obtain a 0.5-V drop) and power

ratings for typical examples of current peak values.

1.6

External components for the charge pump

An internal oscillator, with its output at the CP pin, switches from GND to 10 V with a typical

frequency of 600 kHz (Figure 7).

Figure 7.

Charge pump

When the oscillator output is at ground, C5 is charged by VS through D2. When it rises to

10 V, D2 is reverse-biased and the charge flows from C5 to C8 through D1, so the VBOOT pin,

after a few cycles, reaches the maximum voltage of VS + 10 V - VD1 - VD2, which supplies

the high-side gate drivers.

With a differential voltage between VS and VBOOT of about 9 V and both bridges switching at

50 kHz, the typical current drawn by the VBOOT pin is 1.85 mA.

Table 1.

RSENSE recommended values

Ipk

RSENSE value [Ω]

RSENSE power rating [W]

Alternatives

0.25

0.125

0.5

0.25

0.5

2 X 1

Ω, 0.25 W paralleled

AN2839 Datasheet(PDF) 10 Page - STMicroelectronics