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PM0222 Datasheet(PDF) 26 Page - STMicroelectronics

Part # PM0222
Description  Brain smart hub family
PDF  33 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM0222 Datasheet(HTML) 26 Page - STMicroelectronics

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I2C
PM0222
26/33
DocID025476 Rev 1
10.3
I2C configuration
Following a reset, the I²C logic is disabled and must be configured when in this state.
The control register (I2C_CR) and baud rate register (I2C_BRCR) need to be programmed
to configure the following parameters of the peripheral:
Master or slave
7- or 10-bit addressing mode
Speed mode
Clock rate
Note:
If in slave mode, the I2C_SCR register has to be programmed with the selected slave
address.
Then if in master mode, the I2C_MCR register is used to define the transaction:
Read or write
Slave addresses (7- or 10-bit) to communicate with
Addressing a 7- or 10-bit slave address
Stop condition, to generate a stop or restart condition at the end of the transaction (for
consecutive transactions)
Transaction length
Note:
For a master write, the data to transmit have to be written to the transmit FIFO in the
I2C_TFR register. For a master read, when the master transaction is done, data are
available in the receive FIFO in I2C_RFR.
Before using these examples the I²C module has to be enabled on the CRMU (see
Section 3.1: Peripheral clock gating) and the correct mode has to be configured for the
corresponding IO (see Section 5.1.1: I/O mode).
10.3.1
I2C master
This section will show an example as follows:
Configure the I2C2 IP in master mode with 300 kHz in fast mode
Launch a master write operation of one 8-bit data (0x18), to a slave addressed at 0x1D,
in 7-bit addressing mode
// define the I²C clock rate
// (see calculation in Section 10.2: I2C clock rate calculation example).
I2C2->I2C_BRCR = 0x1D
// enable the peripheral; select the master mode and the fast mode for the baud
// rate generation
I2C2->I2C_CR = 0x01 + (0x1<<1) + (0x1<<4)
Once the I²C peripheral is correctly initiated, the I2C_MCR register has to be configured to
begin a transaction.
// write operation, slave address, 7-bit addressing mode, stop condition generated,
// transaction length
I2C2->I2C_MCR = (0x0) + (0x1D<<1) + (0x1<<12) + (0x1<<14) + (0x1<<15)
I2C2->I2C_TFR = 0x18; // load the data to send in transmit FIFO



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