AN413 datasheet(43/45 Pages) STMICROELECTRONICS

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AN413

Examples of watchdog/timer configurations

Doc ID 1875 Rev 2

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Appendix F

Examples of watchdog/timer configurations

;*********************************************************************

;INIT_WDT: This procedure initializes and starts Watchdog Timer.

;

; Watchdog mode is disabled.

; Timer will down count in continuous mode.

; It will generate an interrupt on channel A0 at each End Of Count.

; —- See the external interrupt parameters initialization.

;*********************************************************************

proc INIT_WDT {

spp #WDT_PG

; To access in paged registers with r.

ld wcr,#wden

; watch dog mode dis., no wait states.

clr wdtpr

; 333 ns(sys.clock=12 MHz) min. count,

; prescaler = 0.

ldw WDTR,#3003

; (3003 X 333) ns = 1 ms.

or wdtcr,#stsp

; Timer starts down counting.

; Continuous mode.

; Watch Dog disabled.

; Input section disabled.

; Output disabled.

; Interrupt A0 on Timer EOC.

; Top Level Interrupt on SW TRAP.

};—- End of proc.

;****************************************

;*Interrupt on channel A0 initialization*

;****************************************

spp #WDT_PG

srp #BK_F

; page 0 reg. direct addressing mode.

clr eipr

; Dis. all external int. pending bits.

nop

; See WARNING (Tech. manual-Chap. 8).

ld eivr,#EXT_IT_VECT ; External interrupt vector.

; IAOS - TLIS = 00 = ...

; ... A0 int. will be on WDT End Of Count.

ld eiplr,#0FEh

; Priority level: group INTA0,INTA1 = 4,5.

ld eimr,#ia0sm

; Unmask Interrupt A0 channel

; (WDT End Of Count).

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