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UNDERSTANDING AND MINIMISING ADC CONVERSION ERRORS

DLE = Actual step width - 1LSB

Ideally analog input voltage change of 1LSB should cause a change in the digital code. If an

analog input voltage greater than 1LSB is required for a change in digital code, then the ADC

has the differential linearity error. DLE thus corresponds to additional maximum voltage that is

required to change one digital code to the next digital code.

DLE is also known as DNL, Differential Non-Linearity error.

Example:

For a range of analog input we should get the same digital output. Ideally the step width should

be 1LSB. Suppose we get same digital output for a range of analog input voltage 1V to 1.010V

then the step width will be 1.010V-1V = 10mV. DLE is thus the voltage difference between the

higher (1.010V) and lower analog voltage (1V) subtracted by the voltage corresponding to

1LSB.

Figure 29. Differential Error representation

With a 10-bit ADC and VAREF = 5V, an analog input of 1V can provide results varying from

CBh to CDh.

Similarly for 1.010V, i.e. 206d = CEh, the results may vary from CDh to CFh.

So, total voltage range corresponding to the step CDh is 1.010 V - 1V

= 10mV

ED= 10mV - 4.88 mV

ED= 5.12 mV

VIN

VSSA

Digital

output

(Decimal

steps)

Actual

transfer curve

1LSB

ideal

Ideal Transfer curve

ED = Differential linearity

error

1LSB

ED (Negative)

Positive

Note: In this example the actual curve is shown to have an offset error from ideal curve.

AN1636 Datasheet(PDF) 31 Page - STMicroelectronics