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AN1711 Datasheet(PDF) 25 Page - STMicroelectronics |
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AN1711 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 40 page ![]() 25/40 SOFTWARE TECHNIQUES FOR COMPENSATING ST7 ADC ERRORS Figure 15. Hardware setup for calibration Example Suppose that the application provides a voltage from a 7805 fixed voltage linear regulator. Be- cause of the tolerance of the linear regulator, the voltage does not stabilise at exactly 5V but remains at 4.900V. If the full scale reference voltage VDDA is 5V, then the result you would expect from converting a 2.5V input with a 10-bit ADC is: (2.5/5)*1023 = 511.5. So we would expect 512 as converted digital value by ADC. If the reference voltage is 4.9V the conversion result for 2.5 will be: (2.5/4.9)*1023 = 521.9 So we will get 522 as converted result. This means that with a lower voltage reference (4.9V) than the ideal voltage reference (5V), the ADC will report higher results. So each result should be adjusted by multiplying it with the calibration constant. So the calibration constant will be (expected value)/actual value = 512/522 = 0.98 Calibrated ADC result = (calibration constant)*(actual digital result). Disadvantages 1. The disadvantage of this technique is that the use of very precise voltage references is costly. 2. The error correction made to the reference voltage is applied to all inputs. If there is an error in this input voltage then the same error is applied to all analog inputs. AIN0 VAIN ADC Microcontroller AIN1 Reference voltage for calibration |
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