Functional changes and silicon fixes in STR91xFA

AN2523

10/23

6

Functional changes and silicon fixes in STR91xFA

6.1

I2C bus

Functional Fix: I2C bus error conditions

Description: Certain bus error conditions were not always reported correctly in the status

registers of the I2C controller. The specific conditions were: (1) failure to set the ARLO bit

when bus contention is detected in the acknowledge pulse in reception mode; (2) failure to

set the BERR bit if a misplaced START or STOP condition occurs on the first data pulse of a

master transmission; and (3) the BUSY bit does not correctly report bus activity if the I2C

controller is not enabled. These bugs have been fixed on STR91xFA.

Impact: Probably none. Since no software workarounds were identified or recommended for

the bugs that were fixed, no changes should be needed in response to the fixes. However,

error recovery software designed according to the I2C protocol specification will now see

correct settings for the ARLO, BERR, and BUSY bits in rare cases where they would

previously have been incorrect.

6.2

PLL

Functional Fix: Configuration Register default value

Description: Default values in the SCU_PLL configuration register after reset were

incorrect for the intended behavior in STR91xF. Defaults have been changed to P=3, N =

0xC0, M = 0x19 (PLL Clock = 48 MHz, assuming 25 MHz main crystal) in STR91xFA.

Impact: Software workaround to set the correct value at startup is no longer required, but

harmless if present.

6.3

RTC

Functional Change: RTC Calibration Frequency

Description: In STR91xF devices, the RTC calibration clock on pin JRTCK was a nominal

4.096 kHz signal, obtained by dividing the 32.768 KHz RTC by eight. In STR91xFA, the

divide by eight is bypassed, and JRTCK is driven 1:1 by the RTC input.

Impact: Speeds up the calibration procedure and provides a digital copy of the RTC for use

by other chips.

6.4

Low power modes

Functional Fix: Idle Mode Dependence on RTC

Description: When entering Idle Mode in STR91xF, the RTC clock must be present for the

internal state machine to switch to low power mode. In the STR91xFA, the RTC clock is no

longer needed. (Note: RTC clock is needed to enter the Sleep mode in both the STR91xF

and STR91xFA device)