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AN2628 Datasheet(PDF) 19 Page - STMicroelectronics |
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AN2628 Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 27 page  AN2628 Register description 19/27 IE.0 Interrupt enable 0: CAN1 interrupt ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.1 Interrupt enable 1: CAN2 interrupt ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.2 Interrupt enable 2: I2C error ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.3 Interrupt enable 3: XSSC error ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.4 Interrupt enable 4: XASC error ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.5 Interrupt enable 5: PLL unlock / oscillator watchdog ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.6 Interrupt enable 6: XPWM channel 3...0 ‘0’: Interrupt request disabled. ‘1’: Interrupt request enabled. IE.7 Interrupt enable 7: No interrupt source associated. Table 3. XIR3SEL register (continued) Bit Function |
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