M24LR64-R memory organization

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M24LR64-R memory organization

Figure 4 shows the memory organization of the M24LR64-R.

Figure 4.

M24LR64-R’s user and system memories

3.1

User memory seen from the I²C bus (E2=0)

The M24LR64-R’s user memory is a 64 Kbit EEPROM similar to the M24C64. To access the

M24LR64-R’s user memory area, E2 has to be reset to 0 in the device select byte.

3.1.1

Sectors

The M24LR64-R’s user memory is organized as 32 sectors of 128 bytes each. The device

has a feature specially added to write-protect sectors: each sector can be write-locked

separately by setting the corresponding I²C_Write_Lock bit. When a sector is write-locked,

the I²C password (see Section 3.1.4: I²C Present Password) has to be presented before the

sector can be written.

3.1.2

Page Write

The page size of the M24LR64-R is 4 bytes, making it possible to write up to 4 bytes in a

single write cycle.

With Page Write you can write up to 32 bytes to an M24C64 device in a single write cycle.