AN4030

Gate to cathode capacitor, impact on dI/dt capability

Doc ID 022635 Rev 1

11/15

2

Gate to cathode capacitor, impact on dI/dt capability

As well as being almost ineffective in improving Triac immunity, a gate to cathode capacitor

has a major drawback when operating with Triacs. A gate to cathode capacitor significantly

decreases the Triac dI/dt capability. For example, Table 5 gives the experimental results

shows that the lifetime of the device is drastically reduced when a 100 nF or 10 nF gate to

cathode capacitor is added. On the other hand, the Triac dI/dt capability remains if a resistor

is added in series with a gate to cathode capacitor.

The high density current during charge and discharge of the capacitor explained the poor

limited this density of current. Triac dV/dt immunity is improved with this circuit and dI/dt

capability is not decreased.

Figure 9 gives the different operating steps when a Triac is switched on in quadrant 2

The event sequence is as follows.

1.

The triggering current is first sunk from the gate by the control circuit.

2.

The pilot SCR is turned on. This pilot SCR is implemented by the P2-N2-P1-N4 layers.

It is not the same SCR that is on at the end of this switching-on process.

3.

A high inrush current circulates through the gate to cathode capacitor due to the pilot

SCR turn-on (without gate to cathode capacitor, the gate current would be limited by

4.

The gate to cathode capacitor is discharged after the main SCR turn-on. This SCR is

implemented by the P2-N2-P1-N1 layers. This causes a high peak gate current and

can damage the Triac.

Table 5.

Repetitive dI/dt tests results with a standard 1 A Triac

Without gate to

cathode capacitor

With gate to cathode

capacitor (100 nF)

dI/dt (A/µs)

30

30

30

3.5

3.5

3.5

Number of cycles

(million of cycles)

50

0.1

50

Results

0 failed / 20

8 failed / 10

0 failed / 10