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AN4030 Datasheet(PDF) 12 Page - STMicroelectronics |
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AN4030 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 15 page ![]() Gate to cathode capacitor, impact on dI/dt capability AN4030 12/15 Doc ID 022635 Rev 1 Figure 9. Sequence of events during Triac switch-on in quadrant 2 Even if the Triac is driven in zero voltage switch mode, a spurious turn-on could appear and a high dI/dt could run through pilot SCR. A gate to cathode capacitor could increase the failure rate as explained above. For example, for the sensitive logic level Triac described in Section 1.4, non repetitive dI/dt capability robustness in Q2 is divided by around 2 with a gate to cathode capacitor: 360 A/µS with CGK = 200 nF and 670 A/µs without gate to cathode capacitor. This behavior is not linked to the Triac technology but directly linked to the internal device. So, whatever the technology, a gate to cathode capacitor will decrease dI/dt capability in repetitive or in accidental mode. N3 P2 N2 P1 N1 P2 N2 P1 A2 A1 G - ++ I G I T I C CGK R G 1 2 4 3 N4 |
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