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AN4157 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN4157 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 24 page ![]() Clock configuration AN4157 6/24 Doc ID 023629 Rev 1 2 Clock configuration The peripheral examples provided within STM32F3DISCOVERY kit Firmware package are configured to run at 72 MHz, using HSE BYPASS as the clock source. However, the user can modify this configuration to use HSI or HSE crystal as the clock source, which needs some hardware modification on the discovery kit hardware. The "system_stm32f30x.c" file provided within each example was customized for use with the discovery kit, allowing the user to select one of the three configurations below (by un- commenting the adequate define). 2.1 PLL_SOURCE_HSI The HSI clock signal is generated from an internal 8 MHz RC Oscillator and can be used directly as a system clock, or divided by 2 to be used as a PLL input. The HSI RC oscillator has the advantage of providing a clock source at low cost (no external components). It also has a faster startup time than the HSE crystal oscillator. However, even with a calibration, the frequency is less accurate than an external crystal oscillator or a ceramic resonator. 2.2 PLL_SOURCE_HSE The high speed external clock signal (HSE) can be generated from two possible clock sources: ● HSE external crystal/ceramic resonator ● HSE user external clock The HSE crystal is not provided with the discovery kit. Some hardware modifications are necessary to connect this crystal. For more details, refer to section "4.10 OSC clock" in "STM32F3 discovery kit User manual (UM1570)". 2.3 PLL_SOURCE_HSE_BYPASS In this mode, the HSE is bypassed with an external clock (fixed at 8 MHz, coming from ST- LINK circuit). It is used to clock the PLL, and the PLL is used as the system clock source. Some hardware modifications are necessary to bypass the HSE with the clock coming from the ST-LINK circuit. For more details, refer to section "4.10 OSC clock" in "STM32F3 discovery kit User manual (UM1570)". Note: PLL_SOURCE_HSE_BYPASS is the default clock configuration. |
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