UPD750004A datasheet(75/84 Pages) NEC

75 / 84 page

µPD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)

Item

Serial interface

Feedback resistor cut flag

(SOS.0)

Sub-oscillator current cut flag

(SOS.1)

(RBS)

Standby release with INT0

Number of vectored interrupts

Processor clock control register

Power supply

Operating ambient temperature

Package

µPD75008

µPD750008

µPD75P0016

3 modes are supported.

• Three-wire serial I/O mode: First transferred bit switchable between the LSB and

MSB

• Two-wire serial I/O mode

• SBI mode

(2/2)

Can incorporate feedback

resistors that are specified

with the mask option.

Not provided

Disable

External: 3, internal: 3

Available when PCC is 0,

2, or 3

VDD = 2.7 to 6.0 V

Incorporated

Provided

Enable

External: 3, internal: 4

Available when PCC is 0 to 3

VDD = 2.2 to 5.5 V

TA = -40 to +85

°C

• 42-pin plastic shrink DIP (600 mil, 1.778 mm pitch)

• 44-pin plastic QFP (10

× 10 mm, 0.8 mm pitch)

UPD750004A Datasheet(PDF) 75 Page - NEC

UPD750004A Datasheet(HTML) 75 Page - NEC

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