ICS84330CVI REVISION A JANUARY 7, 2011

3

©2011 Integrated Device Technology, Inc.

ICS84330CI Data Sheet

720MHZ, CRYSTAL-TO-LVPECL FREQUENCY SYNTHESIZER

Table 1. Pin Descriptions

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Name

Type

Description

Power

Analog supply pin.

XTAL1, XTAL2

Crystal oscillator interface. XTAL1 is an oscillator input, XTAL2 is an oscillator output.

XTAL_SEL

Input

Pullup

Selects between the crystal oscillator or FREF_EXT inputs as the PLL reference source.

Selects XTAL inputs when HIGH. Selects FREF_EXT when LOW.

LVCMOS / LVTTL interface levels.

OE

Input

Pullup

Output enable. LVCMOS / LVTTL interface levels.

nP_LOAD

Input

Pullup

Parallel load input. Determines when data present at M8:M0 is loaded into M divider, and

when data present at N1:N0 sets the N output divide value.

LVCMOS / LVTTL interface levels.

M0, M1, M2

M3, M4, M5

M6, M7, M8

Input

Pullup

M divider inputs. Data latched on LOW-to-HIGH transition of nP_LOAD input. LVCMOS /

LVTTL interface levels.

N0, N1

Input

Pullup

Determines N output divider value as defined in Table 3C Function Table.

LVCMOS / LVTTL interface levels.

Power

Negative supply pins.

TEST

Output

Test output which is used in the serial mode of operation.

Single-ended LVPECL interface levels.

Power

Core supply pins.

nFOUT, FOUT

Output

Differential output for the synthesizer. 3.3V LVPECL interface levels.

nc

Unused

No connect.

FREF_EXT

Input

Pulldown

PLL reference input. LVCMOS / LVTTL interface levels.

S_CLOCK

Input

Pulldown

Clocks the serial data present at S_DATA input into the shift register on the

rising edge of S_CLOCK. LVCMOS / LVTTL interface levels.

S_DATA

Input

Pulldown

Shift register serial input. Data sampled on the rising edge of S_CLOCK.

LVCMOS / LVTTL interface levels.

S_LOAD

Input

Pulldown

Controls transition of data from shift register into the M divider.

LVCMOS / LVTTL interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Input Capacitance

4pF

Input Pullup Resistor

51

k



Input Pulldown Resistor

51

k

