DB829 datasheet(4/29 Pages) CMLMICRO

4 / 29 page

Baseband Signal Processor

MX829 PRELIMINARY INFORMATION

•COM Inc.

www.mxcom.com Tele: 800 638-5577 336 744-5050

Fax: 336 744-5054

Doc. # 20480160.004

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA

All trademarks and service marks are held by their respective companies.

2. Signal List

PIN NO

SIGNAL

TYPE

DESCRIPTION

XTAL

output

Inverted output of the on-chip oscillator.

XTAL/CLOCK

input

Input to the on-chip oscillator, for external Xtal circuit or clock.

SERIAL CLOCK

input

"C-BUS" serial clock input. This clock, produced by the µController, is used for

transfer timing of commands and data to and from the device. See section

7.1.4

COMMAND DATA

input

"C-BUS" serial data input from the µController. Data is loaded into this device

in 8-bit bytes, MSB (B7) first, and LSB (B0) last, synchronized to the SERIAL

CLOCK. See section 7.1.4.

REPLY DATA

output

"C-BUS" serial data output to the µController. The transmission of REPLY

DATA bytes is synchronized to the SERIAL CLOCK under the control of the

CS input. This 3-state output is held at high impedance when not sending

data to the µController. See section 7.1.4.

input

"C-BUS" data loading control function: this input is provided by the µController.

Data transfer sequences are initiated, completed or aborted by the CS signal.

See section 7.1.4.

IRQ

output

This output indicates an interrupt condition to the µController by going to a

logic "0". This is a "wire-ORable" output, enabling the connection of up to 8

peripherals to 1 interrupt port on the µController. This pin has a low

impedance pulldown to logic "0" when active and a high-impedance when

inactive. An external pull-up resistor is required. The conditions that cause

interrupts are indicated in the STATUS register and are effective if not masked

out by a corresponding bit in the CONTROL register. The reading of the

Status Register resets the IRQ to a high impedance and sets the contents of

the Status Register to 0.

CARRIER DETECT

output

The carrier detect output for the MSK Rx.

CD CAP

output

The carrier detect integrating capacitor.

VBIAS

output

A bias line for the internal circuitry, held at VDD/2. This pin must be bypassed

to a capacitor mounted close to the device pins.

MIC

input

AC coupled Tx audio input (external amplification is required for use as a

microphone input).

VSS

Power

Negative supply (ground).

DEMOD IN

input

AC coupled inverting input to the Rx input amplifier (AMP1).

DEMOD FB

output

Output of the Rx input amplifier (AMP1)

FILTER OUT

output

Output of the audio filter/limiter section. In powersave mode this output is

connected to VBIAS via a 500kΩ resistor.

MSK/DTMF OUT

output

The 1200 or 2400 baud MSK Tx output and the DTMF encoder output. When

enabled but not transmitting MSK or DTMF signals, or when in powersave

mode, this output is connected to VBIAS via a 500kΩ resistor. On power-up,

this output can be any level: a General Reset command is required to ensure

that this output attains VBIAS initially.

SUM IN

input

Input to the audio summing amplifier (AMP2).

SUM OUT

output

Output of the audio summing amplifier (AMP2).

MOD1 IN

input

Input to MOD1 audio gain control.

VOL IN

input

Input to the audio volume control.

AUDIO OUT

output

Output of the audio volume control.

MOD1

output

Output of MOD1 audio gain control.

MOD2

output

Output of MOD2 audio gain control.

VDD

Power

Positive supply. Levels and voltages are dependent upon this supply. This pin

should be bypassed to VSS by a capacitor.

DB829 Datasheet(PDF) 4 Page - CML Microcircuits

DB829 Datasheet(HTML) 4 Page - CML Microcircuits

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

Datasheet Download

Link URL