PIC16LC712-04SLASHSS datasheet(77/108 Pages) MICROCHIP

77 / 108 page

PIC16C712/716

Preliminary

DS41106A-page 77

12.1

DC Characteristics:

PIC16C712/716-04 (Commercial, Industrial, Extended)

PIC16C712/716-20 (Commercial, Industrial, Extended)

DC CHARACTERISTICS

Standard Operating Conditions (unless otherwise stated)

Operating temperature

0°C

≤ TA ≤

+70°C

for commercial

-40°C

≤ TA ≤

+85°C

for industrial

-40°C

≤ TA ≤

+125°C

for extended

Param

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

D001

D001A

VDD

Supply Voltage

4.0

VBOR*

5.5

BOR enabled (Note 7)

D002*

VDR

RAM Data Retention Voltage(1)

-1.5

D003

VPOR

VDD Start Voltage to ensure inter-

nal Power-on Reset signal

-VSS

See section on Power-on Reset for details

D004*

D004A*

SVDD

VDD Rise Rate to ensure internal

Power-on Reset signal

0.05

TBD

V/ms

PWRT enabled (PWRTE bit clear)

PWRT disabled (PWRTE bit set)

See section on Power-on Reset for details

D005

VBOR

Brown-out Reset

voltage trip point

3.65

4.35

BODEN bit set

D010

D013

IDD

Supply Current(2,5)

0.8

4.0

2.5

8.0

FOSC = 4 MHz, VDD = 4.0V

FOSC = 20 MHz, VDD = 4.0V

D020

D021

D021B

IPD

Power-down Current(3,5)

10.5

1.5

2.5

µA

VDD = 4.0V, WDT enabled,-40

°C to +85°C

VDD = 4.0V, WDT disabled, 0

°C to +70°C

VDD = 4.0V, WDT disabled,-40

°C to +85°C

VDD = 4.0V, WDT disabled,-40

°C to +125°C

D022*

D022A*

∆IWDT

∆IBOR

Module Differential Current(6)

Watchdog Timer

Brown-out Reset

6.0

TBD

200

µA

WDTE bit set, VDD = 4.0V

BODEN bit set, VDD = 5.0V

FOSC

LP Oscillator Operating Frequency

RC Oscillator Operating Frequency

XT Oscillator Operating Frequency

HS Oscillator Operating Frequency

—

200

KHz

MHz

All temperatures

These parameters are characterized but not tested.

†

Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

Note1:

This is the limit to which VDD can be lowered without losing RAM data.

The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and

switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current con-

sumption.

The test conditions for all IDD measurements in active operation mode are:

OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD,

MCLR = VDD; WDT enabled/disabled as specified.

The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the

part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.

For RC osc mode, current through Rext is not included. The current through the resistor can be estimated by the formula Ir =

VDD/2Rext (mA) with Rext in kOhm.

Timer1 oscillator (when enabled) adds approximately 20

µA to the specification. This value is from characterization and is for

design guidance only. This is not tested.

The

∆ current is the additional current consumed when this peripheral is enabled. This current should be added to the base

IDD or IPD measurement.

This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will operate correctly to

this trip point.

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