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PIC16LC712-04/SS Datasheet(PDF) 103 Page - Microchip Technology |
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PIC16LC712-04/SS Datasheet(HTML) 103 Page - Microchip Technology |
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103 / 108 page  © 1999 Microchip Technology Inc. Preliminary DS41106A-page 103 PIC16C712/716 Prescaler, Capture ............................................................. 40 Prescaler, Timer0 ............................................................... 29 Assignment (PSA Bit) .......................................... 14, 29 Block Diagram ............................................................ 30 Rate Select (PS2:PS0 Bits) ................................. 14, 29 Switching Between Timer0 and WDT ........................ 30 Prescaler, Timer1 ............................................................... 32 Select (T1CKPS1:T1CKPS0 Bits) .............................. 31 Prescaler, Timer2 ............................................................... 42 Select (T2CKPS1:T2CKPS0 Bits) .............................. 36 PRO MATE ® II Universal Programmer ............................. 69 Product Identification System .......................................... 107 Program Counter PCL Register ........................................................ 11, 19 PCLATH Register .......................................... 11, 19, 62 Reset Conditions ........................................................ 58 Program Memory ................................................................. 9 Interrupt Vector ............................................................ 9 Paging .................................................................... 9, 19 Program Memory Map ................................................. 9 Reset Vector ................................................................ 9 Program Verification .......................................................... 65 Programming, Device Instructions ..................................... 67 PWM (CCP Module) .......................................................... 42 Block Diagram ............................................................ 42 CCPR1H:CCPR1L Registers ..................................... 42 Duty Cycle .................................................................. 42 Example Frequencies/Resolutions ............................ 43 Output Diagram .......................................................... 42 Period ......................................................................... 42 Set-Up for PWM Operation ........................................ 43 TMR2 to PR2 Match ............................................ 36, 42 TMR2 to PR2 Match Enable (TMR2IE Bit) ................ 16 TMR2 to PR2 Match Flag (TMR2IF Bit) ..................... 17 Q Q-Clock .............................................................................. 42 R RAM. See Data Memory Register File ....................................................................... 10 Register File Map ............................................................... 10 Reset ............................................................................ 51, 54 Block Diagram ............................................................ 56 Reset Conditions for All Registers ............................. 59 Reset Conditions for PCON Register ......................... 58 Reset Conditions for Program Counter ...................... 58 Reset Conditions for STATUS Register ..................... 58 Timing Diagram .......................................................... 85 Revision History ................................................................. 99 S SEEVAL ® Evaluation and Programming System .............. 71 SLEEP ................................................................... 51, 54, 64 Software Simulator (MPLAB-SIM) ..................................... 71 Special Features of the CPU ............................................. 51 Special Function Registers ................................................ 11 Speed, Operating ................................................................. 1 Stack .................................................................................. 19 STATUS Register .................................................. 11, 13, 62 C Bit ........................................................................... 13 DC Bit ......................................................................... 13 IRP Bit ........................................................................ 13 PD Bit ................................................................... 13, 54 RP1:RP0 Bits ............................................................. 13 TO Bit ................................................................... 13, 54 Z Bit ............................................................................ 13 T T1CON Register .......................................................... 11, 31 T1CKPS1:T1CKPS0 Bits ........................................... 31 T1OSCEN Bit ............................................................ 31 T1SYNC Bit ............................................................... 31 TMR1CS Bit ............................................................... 31 TMR1ON Bit .............................................................. 31 T2CON Register .......................................................... 11, 36 T2CKPS1:T2CKPS0 Bits ........................................... 36 TMR2ON Bit .............................................................. 36 TOUTPS3:TOUTPS0 Bits ......................................... 36 Timer0 ............................................................................... 29 Block Diagram ........................................................... 29 Clock Source Edge Select (T0SE Bit) ................. 14, 29 Clock Source Select (T0CS Bit) .......................... 14, 29 Overflow Enable (T0IE Bit) ........................................ 15 Overflow Flag (T0IF Bit) ...................................... 15, 62 Overflow Interrupt ................................................ 30, 62 Timing Diagram ......................................................... 86 TMR0 Register .......................................................... 11 Timer1 ............................................................................... 31 Block Diagram ........................................................... 32 Capacitor Selection ................................................... 34 Clock Source Select (TMR1CS Bit) ........................... 31 External Clock Input Sync (T1SYNC Bit) ................... 31 Module On/Off (TMR1ON Bit) ................................... 31 Oscillator .............................................................. 31, 34 Oscillator Enable (T1OSCEN Bit) .............................. 31 Overflow Enable (TMR1IE Bit) .................................. 16 Overflow Flag (TMR1IF Bit) ....................................... 17 Overflow Interrupt ................................................ 31, 34 Special Event Trigger (CCP) ............................... 34, 41 T1CON Register .................................................. 11, 31 Timing Diagram ......................................................... 86 TMR1H Register .................................................. 11, 31 TMR1L Register .................................................. 11, 31 Timer2 Block Diagram ........................................................... 36 PR2 Register ................................................. 12, 36, 42 T2CON Register .................................................. 11, 36 TMR2 Register .................................................... 11, 36 TMR2 to PR2 Match Enable (TMR2IE Bit) ................ 16 TMR2 to PR2 Match Flag (TMR2IF Bit) .................... 17 TMR2 to PR2 Match Interrupt ........................ 36, 37, 42 Timing Diagrams Time-out Sequence on Power-up .............................. 60 Wake-up from SLEEP via Interrupt ........................... 65 Timing Diagrams and Specifications ................................. 83 A/D Conversion ......................................................... 89 Brown-out Reset (BOR) ............................................. 85 Capture/Compare/PWM (CCP) ................................. 87 CLKOUT and I/O ....................................................... 84 External Clock ........................................................... 83 Oscillator Start-up Timer (OST) ................................. 85 Power-up Timer (PWRT) ........................................... 85 Reset ......................................................................... 85 Timer0 and Timer1 .................................................... 86 Watchdog Timer (WDT) ............................................. 85 W W Register ......................................................................... 62 Wake-up from SLEEP .................................................. 51, 64 Interrupts ............................................................. 58, 59 MCLR Reset .............................................................. 59 Timing Diagram ......................................................... 65 WDT Reset ................................................................ 59 |
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