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PIC16C641-04E/TQ Datasheet(PDF) 29 Page - Microchip Technology |
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PIC16C641-04E/TQ Datasheet(HTML) 29 Page - Microchip Technology |
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29 / 136 page ![]() © 1996 Microchip Technology Inc. Preliminary DS30559A-page 29 PIC16C64X & PIC16C66X 5.0 I/O PORTS The PIC16C641 and PIC16C642 have three ports, PORTA, PORTB, and PORTC. PIC16C661 and PIC16C662 devices have five ports, PORTA through PORTE. Some pins for these I/O ports are multiplexed with alternate functions for the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin. 5.1 PORTA and TRISA Registers PORTA is a 6-bit wide latch. RA4 is a Schmitt Trigger input and an open drain output. Pin RA4 is multiplexed with the T0CKI clock input. All other RA port pins have Schmitt Trigger input levels and full CMOS output driv- ers. All pins have data direction bits (TRIS registers) which can configure these pins as input or output. Setting a bit in the TRISA register puts the correspond- ing output driver in a hi-impedance mode. Clearing a bit in the TRISA register puts the contents of the output latch on the selected pin. Reading the PORTA register reads the status of the pins, whereas writing to it will write to the port latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that the port pins are read, this value is modified, and then written to the port data latch. The PORTA pins are multiplexed with comparator and voltage reference functions. The operation of these pins are selected by control bits in the CMCON (comparator control register) register and the VRCON (voltage reference control) register. When selected as comparator inputs, these pins will read as '0's. FIGURE 5-1: BLOCK DIAGRAM OF RA1:RA0 PINS TRISA controls the direction of the RA pins, even when they are being used as comparator inputs. The user must make sure to keep the pins configured as inputs when using them as comparator inputs. The RA2 pin will also function as the output for the voltage reference. When in this mode, the VREF pin is a very hi-impedance output. The user must set the TRISA<2> bit and use hi-impedance loads. In one of the comparator modes defined by the CMCON register, pins RA3 and RA4 become outputs of the comparators. The TRISA<4:3> bits must be cleared to enable outputs to use this function. EXAMPLE 5-1: INITIALIZING PORTA CLRF PORTA ;Initialize PORTA by ;clearing output latches MOVLW 0x07 ;Turn comparators off, MOVWF CMCON ;enable pins for I/O BSF STATUS, RP0 ;Select bank1 MOVLW 0x1F ;Value to initialize ;data direction MOVWF TRISA ;Set RA<4:0> as inputs ;TRISA<7:5> are clear Note: On reset, the TRISA register is set to all inputs. The digital inputs are disabled and the comparator inputs are forced to ground to reduce excess current consumption. Note: I/O pins have protection diodes to VDD and VSS. Data bus Q D Q CK P N WR Port WR TRIS Data Latch TRIS Latch RD TRIS RD PORT Analog VSS VDD I/O Pin Q D Q CK Input Mode D Q EN To Comparator Schmitt Trigger Input Buffer This document was created with FrameMaker404 |
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