UPD1001

DS00001759B-page 4

 2014 Microchip Technology Inc.

1.0

INTRODUCTION

1.1

General Description

The UPD1001 is a USB Power Delivery (PD) controller designed to adhere to the USB Power Delivery Specification.

USB Power Delivery allows a host (or device) to provide or consume up to 5 Amps and/or up to 20 Volts of power from

a USB PD capable partner device on the other end of the USB cable. USB PD capable standard and custom cables/

connectors are supported, which in most cases are backward compatible with standard USB connections.

The UPD1001 provides a complete USB Power Delivery solution for all charger and adapter solutions. The functionality

of the UPD1001 is selected via two configuration selection pins, CFG_SEL0 and CFG_SEL1, which can be used to

select unique PD and system configurations. Designing the UPD1001 into a system can be as simple as selecting a

configuration, with no external EEPROM required. Advanced programmability options exist with an external EEPROM

installed.

The integrated USB Power Delivery MAC and PHY support provider and consumer operation via the PD communication

protocol, as specified in Revision 1.0 (Version 1.2) of the USB Power Delivery Specification. Monitoring of VBUS and

battery charging is accomplished via the integrated voltage and current ADC inputs. The PHY supports cable ID detec-

tion/identification and loopback modes. The PHY includes a 24MHz FSK modulator/demodulator and provides inte-

grated terminations. The USB PD MAC supports both USB PD insertion detection (cold socket) and dead battery cases.

The on-chip microcontroller manages the IOs and implements the power delivery local policy engine and device man-

ager. The SPI ROM controller is used by the microcontroller for optional external code execution from ROM. A One Time

Programmable (OTP) ROM is integrated in the UPD1001. Integrated 3.3 V and 1.8 V regulators allow device operation

from a single power supply. The UPD1001 is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C)

temperature ranges. An internal block diagram of the UPD1001 is shown in Figure 1-1.

The UPD1001 is offered in a 32-pin SQFN package. The package provides multiple pin configurations, based upon the

CFG_SEL0 and CFG_SEL1 Configuration Select signals. Table 1-1 summarizes the available pin combinations and

their target applications. Refer to Section 2.0, "Pin Descriptions and Configuration," on page 6 for detailed information

on specific pin configurations.

TABLE 1-1:

UPD1001 PACKAGE/PIN CONFIGURATION SUMMARY

Package

Pin Config.

Name

PD Role

USB Receptacle

Notes

32-SQFN

32-A

Provider

Standard-A (STD-A)

See Section 2.1 for pin assignments

32-B

Consumer/Provider

Standard-B (STD-B)

See Section 2.1 for pin assignments