VNQ7050AJ datasheet(5/42 Pages) STMICROELECTRONICS

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VNQ7050AJ

Block diagram and pin description

Figure 1: Block diagram

Table 1: Pin functions

Name

Function

VCC

Battery connection.

OUTPUT0,1,2,3 Power output.

GND

Ground connection. Must be reverse battery protected by an external diode / resistor

network.

INPUT0,1,2,3

Voltage controlled input pin with hysteresis, compatible with 3 V and 5 V CMOS

outputs. They control output switch state.

Analog current sense output pin delivers a current proportional to the load current.

SEn

Active high, compatible with 3 V and 5 V CMOS outputs input pin; it enables the CS

diagnostic pin.

SEL0,1

Active high, compatible with 3 V and 5 V CMOS outputs input pin; They address the

CS multiplexer.

FaultRST

Active low, compatible with 3 V and 5 V CMOS outputs input pin; it unlatches the

output in case of fault; If kept low, sets the outputs in auto-restart mode.

Channel 3

Channel 2

CH 3

CH 2

Channel 1

Control & Diagnostic

Channel0

VCC

VON

Limitation

Current

Limitation

VCC – OUT

Clamp

Internal supply

CH 1

OUTPUT0

CH 0

Current

Sense

GND

Undervoltage

shut-down

VCC – GND

Clamp

Fault

Short to VCC

Open-Load in OFF

Overtemperature

Power Limitation

VSENSEH

INPUT0

SEL0

SEn

FaultRST

INPUT1

OUTPUT1

Gate Driver

INPUT2

INPUT3

OUTPUT2

OUTPUT3

SEL1

GAPGCFT00605

DocID027405 Rev 1

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