RM41L232 datasheet(7/108 Pages) TI1

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RM41L232

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SPNS240A – OCTOBER 2014 – REVISED JUNE 2015

Revision History

Scope: Applicable updates to the Hercules™ MCU device family, specifically relating to the RM41L232

devices, which are now in the production data (PD) stage of development have been incorporated.

Changes from April 30, 2014 to June 30, 2015 (from Initial Revision (April 2014) to A Revision)

Page

•

Updated/Changed section title to "Device Overview"

........................................................................... 1

•

Added Section 1.3 (Description): Added paragraph describing IOMM

....................................................... 4

•

Section 1.3 (Description): Added the Device Information table

................................................................. 4

•

Added Section 3, Device Comparison

............................................................................................. 8

•

Section 5.1 Absolute Maximum Ratings): Moved Storage temperature range, Tstg from Section 5.2 ESD Ratings ... 18

•

Section 5.2 (ESD Ratings): Updated/Changed section title

................................................................... 18

•

Section 5.3 (Power-On Hours (POH)): Added table (new)

.................................................................... 18

•

Table 5-4 (Selectable 8mA/2mA Control): Clarified impact of SPI2PC9 register on drive strength of SPI2SOMI

pin in footnote

........................................................................................................................ 23

•

Section 6.4.1 (Summary of ARM Cortex-R4 CPU Features): Added Quantity of Breakpoints and Watchpoints

...... 31

•

Section 6.20.3 (JTAG Identification Code): Added a table showing JTAG ID code for each silicon revision.

.......... 64

•

Table 7-7 (MibADC Operating Characteristics ): Added missing footnote for ZSET 10-/12-bit modes. ................... 73

•

Section 7.7.1 (Features [MibSPI]): Updated/Changed size of SPI baud clock generator from "8-bit" to "11-bit"

....... 83

•

Figure 8-1 (Device Numbering Conventions): Updated/Change figure to include "Die Revision"

........................ 96

•

Section 8.2.1 (Related Documentation from Texas Instruments): Added reference documents

......................... 97

•

Section 8.7 (Device Identification Code Register): Added silicon revision B device identification code

................. 97

•

Section 8.8 (Die Identification Registers): Updated/Changed the DIEIDL and DIEIDH to point to the original

registers at location 0xFFFFFF7C and 0xFFFFFF80

.......................................................................... 98

Revision History

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