LM3445MSLASHNOPB datasheet(14/42 Pages) TI1

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C10

VBUCK

V+

C10

VBUCK

V+

LM3445

SNVS570M – JANUARY 2009 – REVISED NOVEMBER 2015

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Feature Description (continued)

decrease as VBUCK decreases.

2. Minimum on-time is reached which fixes the duty-cycle and therefore reduces the voltage at VBUCK.

The transition from dimming with the DIM decoder to headroom or minimum on-time dimming is seamless. LED

currents from full load to as low as 0.5 mA can be easily achieved.

7.3.10 Valley-Fill Circuit

VBUCK supplies the power which drives the LED string. Diode D3 allows VBUCK to remain high while V+ cycles on

and off. VBUCK has a relatively small hold capacitor C10 which reduces the voltage ripple when the valley fill

capacitors are being charged. However, the network of diodes and capacitors shown between D3 and C10 make

up a valley-fill circuit. The valley-fill circuit can be configured with two or three stages. The most common

configuration is two stages. Figure 15 illustrates a two and three stage valley-fill circuit.

Figure 15. Two and Three Stage Valley Fill Circuit

The valley-fill circuit allows the buck regulator to draw power throughout a larger portion of the AC line. This

allows the capacitance needed at VBUCK to be lower than if there were no valley-fill circuit, and adds passive

power factor correction (PFC) to the application. Besides better power factor correction, a valley-fill circuit allows

the buck converter to operate while separate circuitry translates the dimming information. This allows for dimming

that isn’t subject to 120Hz flicker that can be perceived by the human eye.

7.3.11 Valley-Fill Operation

When the input line is high, power is derived directly through D3. The term input line is high can be explained

as follows. The valley-fill circuit charges capacitors C7 and C9 in series (see Figure 16) when the input line is

high.

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LM3445M/NOPB Datasheet(PDF) 14 Page - Texas Instruments