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BCM4354 Datasheet(PDF) 106 Page - Cypress Semiconductor |
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BCM4354 Datasheet(HTML) 106 Page - Cypress Semiconductor |
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106 / 192 page ![]() Signal Descriptions BCM4354 Data Sheet BROADCOM CONFIDENTIAL Broadcom® October 15, 2014 • 4354-DS109-R Page 105 WLAN SDIO Bus Interface These signals can support alternate functionality depending on package and host interface mode. See Table 26: “GPIO Alternative Signal Functions,” on page 120 78 SDIO_CLK I SDIO clock input 81 SDIO_CMD I/O SDIO command line 82 SDIO_DATA_0 I/O SDIO data line 0 77 SDIO_DATA_1 I/O SDIO data line 1 80 SDIO_DATA_2 I/O SDIO data line 2 79 SDIO_DATA_3 I/O SDIO data line 3 WLAN HSIC Interface 100 HSIC_STROBE I/O HSIC Strobe 101 HSIC_DATA I/O HSIC Data 99 RREFHSIC I HSIC reference resistor input. If HSIC is used, connect this pin to ground via a 51-ohm 5% resistor. On SDIO designs this pin should not be connected. WLAN GPIO Interface The GPIO signals can be multiplexed via software and the JTAG_SEL pin to support other functions. See Table 23: “WLAN GPIO Functions and Strapping Options,” on page 119 and Table 26: “GPIO Alternative Signal Functions,” on page 120 for additional details. 218 GPIO_0 I/O Programmable GPIO pins 219 GPIO_1 I/O 220 GPIO_2 I/O 221 GPIO_3 I/O 229 GPIO_4 I/O 237 GPIO_5 I/O 236 GPIO_6 I/O 189 GPIO_7 I/O 196 GPIO_8 I/O 205 GPIO_9 I/O 185 GPIO_10 I/O 192 GPIO_11 I/O 199 GPIO_12 I/O 182 GPIO_13 I/O 188 GPIO_14 I/O 195 GPIO_15 I/O JTAG Interface 239 JTAG_SEL I/O JTAG select: pull high to select the JTAG interface. If the JTAG interface is not used this pin may be left floating or connected to ground. Note: See Table 26: “GPIO Alternative Signal Functions,” on page 120 for the JTAG signal pins. Table 21: WLCSP Signal Descriptions (Cont.) Bump# Signal Name Type Description |
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