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AM1705DPTP3 Datasheet(PDF) 35 Page - Texas Instruments |
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AM1705DPTP3 Datasheet(HTML) 35 Page - Texas Instruments |
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35 / 165 page ![]() AM1705 www.ti.com SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014 5.3 Recommended Operating Conditions MIN NOM MAX UNIT 375 MHz version 1.14 1.2 1.32 V Supply voltage, Core CVDD (CVDD, PLL0_VDDA) 456 MHz version 1.25 1.3 1.35 V 375 MHz version 1.14 1.2 1.32 V RVDD Supply Voltage, Internal RAM 456 MHz version 1.25 1.3 1.35 V Supply voltage, I/O, 1.8V 1.71 1.8 1.89 V (USB0_VDDA18) DVDD Supply voltage, I/O, 3.3V 3.0 3.3 3.45 V (DVDD, USB0_VDDA33) Supply ground VSS 0 0 0 V (VSS, PLL0_VSSA, OSCVSS(1)) VIH (2) High-level input voltage, I/O, 3.3V 2 V High-level input voltage, OSCIN 0.7*CVDD V VIL (2) Low-level input voltage, I/O, 3.3V 0.8 V Low-level input voltage, OSCIN 0.3*CVDD V VHYS Input Hysteresis 160 mV Transition time, 10%-90%, All Inputs (unless otherwise specified in tt 0.25P or 10 (3) ns the electrical data sections) 375 (1.2V) Commercial (default) 0 MHz 456 (1.3V) FSYSCLK6 ARM Operating Frequency (SYSCLK6) Industrial (D suffix) 0 456 (1.3V) MHz Extended (A suffix) 0 375(1.2V) MHz (1) When an external crystal is used, oscillator (OSC_VSS) ground must be kept separate from other grounds and connected directly to the crystal load capacitor ground. These pins are shorted to VSS on the device itself and should not be connected to VSS on the circuit board. If a crystal is not used and the clock input is driven directly, then the oscillator VSS may be connected to board ground. (2) Unless specifically indicated, these I/O specifications do not apply to USB I/Os. USB0 I/Os adhere to USB2.0 specification. (3) Whichever is smaller. P = the period of the applied signal. Maintaining transition times as fast as possible is recommended to improve noise immunity on input signals. Copyright © 2010–2014, Texas Instruments Incorporated Device Operating Conditions 35 Submit Documentation Feedback Product Folder Links: AM1705 |
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