AM1705DPTP3 datasheet(91/165 Pages) TI1

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AM1705

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SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014

Table 6-42. McASP Registers Accessed Through DMA Port

McASP0

McASP1

BYTE

ACRONYM

ADDRESS

Receive buffer DMA port address. Cycles through receive serializers,

Read

skipping over transmit serializers and inactive serializers. Starts at the

01D0 2000

01D0 6000

RBUF

Accesses

lowest serializer at the beginning of each time slot. Reads from DMA port

only if RBUSEL = 0 in RFMT.

Transmit buffer DMA port address. Cycles through transmit serializers,

Write

skipping over receive and inactive serializers. Starts at the lowest serializer

01D0 2000

01D0 6000

XBUF

Accesses

at the beginning of each time slot. Writes to DMA port only if XBUSEL = 0 in

XFMT.

Table 6-43. McASP AFIFO Registers Accessed Through Peripheral Configuration Port

McASP0

McASP1

ACRONYM

BYTE ADDRESS

0x01D0 1000

0x01D0 5000

AFIFOREV

AFIFO revision identification register

0x01D0 1010

0x01D0 5010

WFIFOCTL

Write FIFO control register

0x01D0 1014

0x01D0 5014

WFIFOSTS

Write FIFO status register

0x01D0 1018

0x01D0 5018

RFIFOCTL

Read FIFO control register

0x01D0 101C

0x01D0 501C

RFIFOSTS

Read FIFO status register

Peripheral Information and Electrical Specifications

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