DP83932C datasheet(13/98 Pages) NSC

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30 Buffer Management

31 BUFFER MANAGEMENT OVERVIEW

The SONIC’s buffer management scheme is based on sep-

arate buffers and descriptors (

Figures 3-2 and 3-11 ) Pack-

ets that are received or transmitted are placed in buffers

called the Receive Buffer Area (RBA) and the Transmit Buff-

er Area (TBA) The system keeps track of packets in these

buffers using the information in the Receive Descriptor Area

(RDA) and the Transmit Descriptor Area (TDA) A single

(TDA) points to a single TBA but multiple RDAs can point to

a single RBA (one RDA per packet in the buffer) The Re-

ceive Resource Area (RRA) which is another form of de-

scriptor is used to keep track of the actual buffer

When packets are transmitted the system sets up the pack-

ets in one or more TBAs with a TDA pointing to each TBA

There can only be one packet per TBATDA pair A single

TBA however may be made up of several fragments of

data dispersed in memory There is one TDA pointing to

each TBA which specifies information about the buffer’s

size location in memory number of fragments and status

after transmission The TDAs are linked together in a linked

list The system causes the SONIC to transmit the packets

by passing the first TDA to the SONIC and issuing the trans-

mit command

Before a packet can be received an RDA and RBA must be

set up by the system RDA’s are made up as a linked list

similar to TDAs An RDA is not linked to a particular RBA

though Instead an RDA is linked specifically to a packet

after it has been buffered into an RBA More than one pack-

et can be buffered into the same RBA but each packet gets

its own RDA A received packet can not be scattered into

fragments The system only needs to tell the SONIC where

the first RDA and where the RBAs are Since an RDA never

specifically points to an RBA the RRA is used to keep track

of the RBAs The RRA is a circular queue of pointers and

buffer sizes (not a linked list) When the SONIC receives a

packet it is buffered into a RBA with a corresponding and

unique RDA that is written to so that it points to and de-

scribes the new packet If the RBA does not have enough

space to buffer the next packet a new RBA is obtained from

the RRA

32 DESCRIPTOR AREAS

Descriptors are the basis of the buffer management scheme

used by the SONIC A RDA points to a received packet

within a RBA RRA points to a RBA and a TDA points to a

TBA which contains a packet to be transmitted The con-

ventions and registers used to describe these descriptors

are discussed in the next three sections

321 Naming Convention for Descriptors

The fields which make up the descriptors are named in a

consistent manner to assist in remembering the usage of

each descriptor Each descriptor name consists of three

components in the following format

RXTX descriptor name

field

The first two capital letters indicate whether the descriptor is

used for transmission (TX) or reception (RX) and is then

followed by the descriptor name having one of two names

rsrc e Resource descriptor

pkt e Packet descriptor

The last component consists of a field name to distinguish it

from the other fields of a descriptor The field name is sepa-

rated from the descriptor name by a period (‘‘’’) An exam-

ple of a descriptor is shown below

TLF10492 – 86

322 Abbreviations

The abbreviations in Table 31 are used to describe the

SONIC registers and data structures in memory The ‘‘0’’

and ‘‘1’’ in the abbreviations indicate the least and most

significant portions of the registers or descriptors Table 3-1

lists the naming convention abbreviations for descriptors

323 Buffer Management Base Addresses

The SONIC uses three areas in memory to store descriptor

information the Transmit Descriptor Area (TDA) Receive

Descriptor Area (RDA) and the Receive Resource Area

(RRA) The SONIC accesses these areas by concatenating

a 16-bit base address register with a 16-bit offset register

The base address register supplies a fixed upper 16 bits of

address and the offset registers provide the lower 16 bits of

address The base address registers are the Upper Trans-

mit Descriptor Address (UTDA) Upper Receive Descriptor

Address (URDA) and the Upper Receive Resource Address

(URRA) registers The corresponding offset registers are

shown below

Upper Address Registers

Offset Registers

URRA

RSA REA RWP RRP

URDA

CRDA

UTDA

CTDA

See Table 3-1 for definition of register mnemonics

Figure 3-1 shows an example of the Transmit Descriptor

Area and the Receive Descriptor Area being located by the

UTDA and URDA registers The descriptor areas RDA

TDA and RRA are allowed to have the same base address

ie URRAeURDAeUTDA Care however must be taken

to prevent these areas from overwriting each other

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