TMS320DM640 datasheet(38/171 Pages) TI

38 / 171 page

Pin Assignments

June 2003 − Revised August 2004

SPRS222C

McBSPs

(Multichannel Buffered Serial Ports)

VP0D[0]/CLKX0†‡

VP0D[1]/FSX0†‡

VP0D[2]/DX0†‡

VP0D[6]/CLKR0†‡

VP0D[5]/FSR0†‡

VP0D[4]/DR0†‡

VP0D[3]/CLKS0†‡

Transmit

McBSP0

Receive

Clock

VP1D[0]/CLKX1†§

VP1D[1]/FSX1†§

VP1D[2]/DX1†§

VP1D[6]/CLKR1†§

VP1D[5]/FSR1†§

VP1D[4]/DR1†§

VP1D[3]/CLKS1†§

Transmit

McBSP1

Receive

Clock

TOUT0/MAC_EN

Timers

TINP0

TOUT1/LENDIAN

Timer 1

TINP1

Timer 2

Timer 0

SCL0

I2C0

SDA0

† For DM641, these McBSP1 and McBSP0 pins are muxed with the Video Port 1 (VP1) and Video Port 0 (VP0) peripherals, respectively. By

default, these signals function as VP1 and VP0, respectively. For more details on these muxed pins, see the Device Configurations section

of this data sheet.

‡ For DM640, these McBSP0 pins are muxed with the Video Port 0 (VP0) peripheral. By default, these signals function as VP0. For more details

on these muxed pins, see the Device Configurations section of this data sheet.

§ The DM640 device does not support the VP1 peripheral; therefore, the McBSP1 peripheral pins are standalone perpheral functions, not

muxed.

DM641/DM640

Figure 1−6. Peripheral Signals (Continued)

TMS320DM640 Datasheet(PDF) 38 Page - Texas Instruments

TMS320DM640 Datasheet(HTML) 38 Page - Texas Instruments

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