LMP7312MASLASHNOPB datasheet(4/29 Pages) TI1

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LMP7312

SNOSB32B – MARCH 2010 – REVISED MARCH 2013

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5V Electrical Characteristics

(1) (continued)

Unless otherwise specified, all limits ensured for TA = 25°C, V

+ = 5V, V

IO = 5V, V

− = 0V, G = 0.192 V/V, V

CM_ATT=(+VIN+(-

VIN))/2, VCM_AMP=(+IN+(-IN))/2. Differential output configuration. SE = Single Ended Output, DE = Differential Output.Boldface

limits apply at the temperature extremes.

Symbol

Parameter

Conditions

Min (2)

Typ (3)

Max (2)

Units

TCVOS

Core op-amp Input

Nulling Switch Mode, DE, VOCM = 1V;

-3

±1.5

Offset Voltage (4)

Nulling Switch Mode, SE, -VOUT/VR = 1V

µV/°C

Nulling Switch Mode, DE, VOCM = 4V;

-3

±1.5

Nulling Switch Mode, SE, -VOUT/VR = 4V

All gains, RL = 10 kΩ, CL = 50pF, SE / DE

–0.035

0.035

Gain Error

–0.045

0.045

Gain Drift

SE / DE

-5

±1

ppm/°C

Core op-amp Voltage

RTI, Nulling Switch Mode, f = 10 kHz

7.25

nV/

√Hz

Noise Density

Core op-amp Peak to

RTI, Nulling Switch Mode, f= 0.1Hz to 10Hz

µVPP

Peak Voltage Noise

IVA

Analog Supply Current

+VIN = −VIN = VOCM

IVIO

Digital Supply Current

Without any load connected to SDO pin

120

μA

RIN_CM

CM Input Resistance

G= 0.192 V/V

62.08

Ω

G= 1 V/V

RIN_DIFF

Differential Input

G= 0.192 V/V

248.3

Ω

Resistance

G= 1 V/V

160

G= 0.096V/V, -15V < VCM_ATT < 15V, SE / DE

G= 0.192V/V, -11.4V < VCM_ATT < 15V, SE / DE

G= 0.384V/V, -6V < VCM_ATT < 11V, SE / DE

DC Common Mode

CMRR

Rejection Ratio

G= 0.768V/V, -3V < VCM_ATT < 8V, SE / DE

G= 1V/V, -2.3V < VCM_AMP < 7.3V, SE / DE

G= 2V/V, -1.15V < VCM_AMP < 6.15V, SE / DE.

PSRR

Core op-amp DC

Nulling Switch Mode, 4.5V <V+ <5.5V

Power Supply Rejection

Ratio

VOCM_OS

VOCM Output Offset

(5)

VOCM = 2.5 V

-20

VOUT

Positive Output Voltage

RL = 10 kΩ, CL = 50 pF,

V+

−0.2

Swing

+VIN= 15V, -VIN= -15V

Negative Output

RL = 10 kΩ, CL = 50 pF,

V−+0.2

Voltage Swing

+VIN= -15V, -VIN= 15V

+VIN= -VIN = 2.5V, +VOUT, -VOUT/VR connected

Short circuit current

individually to either V+ or V-

IOUT

Current limitation

Internal current limiter

Attenuation Mode, G = 0.096 V/V, RL =10 kΩ,

1.2

CL = 50 pF

MHz

Attenuation Mode, G = 0.192 V/V, RL = 10 kΩ,

1.0

CL = 50 pF

Attenuation Mode, G = 0.384 V/V, RL = 10 kΩ,

560

CL = 50 pF

GBW

Bandwidth

kHz

Attenuation Mode, G = 0.768 V/V, RL = 10 kΩ,

310

CL = 50 pF

Amplification Mode, G = 1 V/V, RL = 10 kΩ,

530

CL = 50 pF

kHz

Amplification Mode, G = 2 V/V, RL = 10 kΩ,

280

CL = 50 pF

(4)

Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature

change.

(5)

VOCM_OS is the difference between the Output Common mode voltage (+VOUT+(-VOUT/VR))/2 and the Voltage on the VOCM pin.

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