+IN

-IN

OUT

1

2

6

+

±

+IN

-IN

OUT

1

2

6

+

±

OUT

FB

REFS

REFF

R1

R2

Z1

Z2

LMP8358

www.ti.com

SNOSB09B – APRIL 2010 – REVISED MARCH 2013

Figure 53. External Gain Set Resistors and Filter Capacitor

Frequency Compensation (Serial)

The gain-bandwidth compensation is set to one of five levels under program control. The amount of

compensation can be decreased to maximize the available bandwidth as the gain of the amplifier is increased.

The compensation level is selected by setting bits COMP[2:0] of the control register with 000b, 001b, 010b, 011b,

or 1xxb. Table 8 shows the bandwidths achieved at the selectable gain and compensation settings. Note that for

gains 10X and 20X, the recommended compensation setting is 000b. For the gain setting 50X, compensation

settings may be 000b and 001b. Gain settings 100X and 200X may use the three bandwidth compensation

settings 000b, 001b, and 010b. At gains of 500X and 1000X, all bandwidth compensation ranges may be used.

Note that for lower gains, it is possible to under compensate the amplifier into instability.

Table 8. Frequency Compensation (Register bits 5:3)

Bandwidth

Gain\COMP [2:0]

000

001

010

011

1xx

10

930 kHz

n/a

n/a

n/a

74 kHz

20

385 kHz

n/a

n/a

n/a

37 kHz

50

160 kHz

460 kHz

n/a

n/a

16 kHz

100

80 kHz

225 kHz

640 kHz

n/a

8 kHz

200

38 kHz

95 kHz

195 kHz

n/a

4 kHz

500

16 kHz

40 kHz

85 kHz

130 kHz

1.5 kHz

1000

8 kHz

22 kHz

50 kHz

89 kHz

0.8 kHz

User Defined Gain

> 10x

> 30x

> 100x

> 300x

> 1x

GBW Product

8 MHz

24 MHz

80 MHz

240 MHz

0.8 MHz

(For external filter cap)

Input Multiplexer and Polarity Switch (Serial)

The Input Multiplexer Selection bits MUX[1:0] and Polarity bit POL can be used to set the inputs of the LMP8358

to the states shown in Table 9.

Table 9. Input Multiplexer and Polarity (Register bits 8:6)

MUX1

MUX0

Diff Input for POL = 0

Diff Input for POL = 1

0

0

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