TAS5706APAPR datasheet(38/71 Pages) TI1

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Calculation of Output Signal Level of TAS5706A/B Feedback Power Stage

TAS5706A

TAS5706B

SLOS606D – MARCH 2009 – REVISED SEPTEMBER 2009............................................................................................................................................. www.ti.com

(Gain Is independent of PVCC)

The gain of the TAS5706A/B is the total digital gain of the controller multiplied by the gain of the power stage.

For a half-bridge channel of the TAS5706A/B power stage, the gain is simply:

Power stage gain = 13 × VRMS / Modulation Level

Modulation level = fraction of full-scale modulation of the PWM signal at the input of the power stage.

VRMS = Audio voltage level at the output of the power stage = 13 × Modulation Level

For the TAS5706A/B controller, the gain is the programmed digital gain multiplied by a scaling factor, called the

maximum modulation level. The maximum modulation level is derived from the modulation limit programmed in

the controller, which limits duty cycle to a set number of percent above 0% and below 100%. Setting the

modulation limit to 97.7% (default) limits the duty cycle between 2.3% and 97.7%.

Controller gain = digital gain × maximum modulation level × (modulation level/digital FFS)

Digital FFS = digital input fraction of full scale

Modulation limit = 97.7%

Maximum modulation level = 2 × modulation limit – 1 = 0.954

The output signal level of the TAS5706A/B can now be calculated.

VRMS = digital FFS × digital gain × maximum modulation level × 13

With the modulation limit set at the default level of 97.7%, this becomes:

VRMS = digital FFS × digital gain × 12.4

(Single-ended)

VRMS = digital FFS × digital gain × 24.8

(BTL)

Example: Input = –20 dbFS; volume = 0 dB; biquads = ALL PASS; modulation index = 97.7%; mode = BTL

Output VRMS = 24.8 × 0.1 × 1 = 2.48 V

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Product Folder Link(s): TAS5706A TAS5706B

TAS5706A is Not Recommended for New Designs

TAS5706APAPR Datasheet(PDF) 38 Page - Texas Instruments

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