PC33991DHSLASHR2 datasheet(29/36 Pages) MOTOROLA

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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

33991

Over Current Fault Requirements:

Output currents are limited to safe levels, then the device will

rely on Thermal Shutdown to protect itself.

Under Voltage Fault Requirements

Severe under voltage VPWR conditions may result in

uncertain pointer positions; therefore, recalibration of the

pointer position may be advisable. During an under voltage

event, the state machine and outputs continues to operate,

although the outputs may be unable to reach the higher voltage

levels. The master is notified of an under voltage event via the

SO pin. Under voltage detection occurs regardless whether the

gauge(s) are enabled, or disabled.

Note:

There is no way to distinguish between over voltage and

under voltage faults from the status bits. If there is no external means

for the microcontroller to determine the fault type, the gauges should

be routinely enabled following the transition to logic [0] of ST6.

Electrical Requirements

All voltages specified are measured relative to the device

ground pins, unless otherwise noted. Current flowing into

33991is positive, while current flowing out of the device is

negative.

Resets (Sleep Mode)

The device can reset internally or externally. If the VDD level

falls below the VDDUV level, specified in the Static Electrical

Characteristics, the device resets and powers up in the Default

mode. Similarly, If the RST pin is driven to a logic [0], the device

will reset to its default state. The device will consume the least

amount of current (Idd and Ipwr) when the RST pin is logic [0].

This is also referred to as the Sleep mode.

APPLICATION INFORMATION

The 33991is an extremely versatile device, used in a variety

of applications. Table 15, and the following sample code,

provides a step-by-step example of configuring using many of

the features designed into the IC. This example is intended to

give a generic overview of how the device could be used.

Further, it is intended to familiarize users with some of its

capabilities. In Steps 1-9, the gauges are enabled, the clock is

calibrated, the device is configured for RTZ, and the pointers

are calibrated with the RTZ command. Steps 1-9 are

representative of the first steps after power-up. Maximum

velocity is set in Step 10, if necessary. In Steps 11 and 12,

pointers are commanded to the desired positions by the master.

These steps are the most frequently used during normal

operation. Steps 13 -15 place the pointer close to the zero

position prior to the initiation of the RTZ commands in Steps 16-

19. Step 20 disables the gauges, placing them into a Low

Quiescent Current mode.

Table 15. GDIC SETUP, CONFIGURATION, & USAGE EXAMPLE

Step

Number

Command

Description

Table/Figure

Number

PECR

a. Enable Gauges.

- Bit PE0: Gauge 0.

- Bit PE1: Gauge 1.

Table 3

Figure 7

b. Clock Calibration

- Bit PE3: enables calibration procedure.

- Bit PE4: set clock f =1 MHz maximum or nominal.

Send 8 µs pulse on CS to calibrate 1 MHz clock.

RTZCR

Set RTZ Full Step Time

- Bits RC3:RC0.

Tables 9-10

Set RTZ Blanking Time

-Bit RC4.

Tables 9-10

Preload RTZ Accumulator.

- Bits RC12:RC5.

Table 11

Check SO for an Out of Range Clock Calibration.

- Is bit ST7 logic level 1? If so, repeat Steps 1 and 2.

Table 12

POS0R

a. Move pointer to position 24 prior to RTZ.

Table 5

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

PC33991DH/R2 Datasheet(PDF) 29 Page - Motorola, Inc

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