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MAX1102 Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX1102 Datasheet(HTML) 9 Page - Maxim Integrated Products |
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9 / 16 page ![]() LSB of the control word. Successive conversions are initiated after the last bit of the previous conversion result has been clocked out. Resultant data is only available after conversion is complete. The time required for the T/H to acquire an input signal is a function of how quickly its input capacitance is charged. If the input signal’s source impedance is high, the acquisition time lengthens, and more time must be allowed between conversions. This time, tACQ2, is cal- culated by the following equation: tACQ2 = (6.2 ✕ RS ✕ 15pF) + tACQ where RS = the source impedance of the input signal; tACQ is the T/H acquisition time from the Electrical Characteristics table. Conversion Progress The comparator’s negative input is connected to the auto-zero rail. Since the device requires only a single supply, the ZERO node at the input of the comparator equals VDD/2. The capacitive DAC restores node ZERO to have no voltage difference at the comparator inputs within the limits of an 8-bit resolution. Input Voltage Range Internal protection diodes that clamp the analog input to VDD and GND allow AIN to swing from (GND - 0.3V) to (VDD + 0.3V) without damaging the device. However, for accurate conversions, the input must not exceed (VDD + 0.05V) or be less than (GND - 0.05V). The valid input range for the analog input is from GND to VREF. The output code is invalid (code zero) when a negative input voltage is applied, and full scale (FS) when the input voltage exceeds the reference. Input Bandwidth The ADC’s input tracking circuitry has a 2.5MHz full- power bandwidth, so it is possible to digitize high- speed transient events and measure periodic signals with bandwidths exceeding the ADC’s sampling rate by using undersampling techniques. To avoid high-fre- quency signals being aliased into the frequency band of interest, low-pass filters such as the MAX7418– MAX7426 are recommended. Digital-to-Analog Converter The MAX1102/MAX1103/MAX1104 DAC section uses an R-2R ladder network that converts the 8-bit digital input into an equivalent analog output voltage propor- tional to the applied reference voltage (Figure 3). The DAC features a double-buffered input, and a buffered analog output. 8-Bit CODECs _______________________________________________________________________________________ 9 AIN HOLD HOLD TRACK 5pF TRACK ZERO CAPACITIVE DAC VDD/2 VREF GND 15pF MAX1102 MAX1103 MAX1104 2R R R R R 2R 2R 2R 2R 2R REF GND NOTE: SWITCH POSITIONS SHOWN FOR DAC CODE FFhex. DAC_ REGISTER OUT MSB LSB 2R R R R 2R 2R 2R 2R Figure 2. Equivalent Input Circuit Figure 3. DAC Simplified Circuit Diagram |
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