10kΩ

OPA177

100Ω

100Ω

1/2 REF200

1/2 REF200

V+

R

G

INA128

Ref

V

O

V

IN

V

IN

+

−

±10mV

Adjustment Range

V−

100µA

100µA

INA128, INA129

SBOS051C – OCTOBER 1995 – REVISED OCTOBER 2015

www.ti.com

Typical Application (continued)

8.2.2 Detailed Design Procedure

8.2.2.1 Setting the Gain

INA128: g = 1 + 50 k

(1)

Commonly used gains and resistor values are shown in Figure 24.

The 50-k

chip metal film resistors are laser-trimmed to accurate absolute values. The accuracy and temperature coefficient

of these internal resistors are included in the gain accuracy and drift specifications of the INA128.

gain accuracy and drift can be directly inferred from Equation 1. Low resistor values required for high gain can

make wiring resistance important. Sockets add to the wiring resistance, which contributes additional gain error

(possibly an unstable gain error) in gains of approximately 100 or greater.

8.2.2.2 Dynamic Performance

The typical performance curve Figure 1 shows that, despite its low quiescent current, the INA12x achieves wide

bandwidth even at high gain. This is due to the current-feedback topology of the input stage circuitry. Settling

time also remains excellent at high gain.

8.2.2.3 Offset Trimming

The INA12x is laser-trimmed for low-offset voltage and offset voltage drift. Most applications require no external

offset adjustment. Figure 25 shows an optional circuit for trimming the output offset voltage. The voltage applied

to the Ref terminal is summed with the output. The op amp buffer provides low impedance at the Ref terminal to

preserve good common-mode rejection.

Figure 25. Optional Trimming of Output Offset Voltage

8.2.2.4 Input Bias Current Return Path

Ω. However, a path must be provided

for the input bias current of both inputs. This input bias current is approximately ±2 nA. High input impedance

means that this input bias current changes very little with varying input voltage.

Input circuitry must provide a path for this input bias current for proper operation. Figure 26 shows various

provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which

exceeds the common-mode range, and the input amplifiers will saturate.

14

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