OPA690IDBVT datasheet(12/22 Pages) TI

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OPA690

SBOS223A

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1V of either supply pin while delivering > 100mA output current.

A demanding 100

Ω load to a midpoint bias is used in this

characterization circuit. The new output stage circuit used in the

OPA690 can deliver large bipolar output currents into this

midpoint load with minimal crossover distortion, as shown in the

+5V supply, 3rd-harmonic distortion plots.

SINGLE-SUPPLY ADC INTERFACE

Most modern, high performance ADC (such as the TI ADS8xx

and ADS9xx series) operate on a single +5V (or lower) power

supply. It has been a considerable challenge for single-supply

op amps to deliver a low distortion input signal at the ADC input

for signal frequencies exceeding 5MHz. The high slew rate,

exceptional output swing, and high linearity of the OPA690

make it an ideal single-supply ADC driver. The circuit on the

front page shows one possible (inverting) interface. Figure 3

shows the test circuit of Figure 2 modified for a capacitive (ADC)

load and with an optional output pull-down resistor (RB).

The OPA690 in the circuit of Figure 3 provides > 200MHz

bandwidth for a 2Vp-p output swing. Minimal 3rd-harmonic

distortion or 2-tone, 3rd-order intermodulation distortion will be

observed due to the very low crossover distortion in the OPA690

output stage. The limit of output Spurious-Free Dynamic Range

(SFDR) will be set by the 2nd-harmonic distortion. Without RB,

the circuit of Figure 3 measured at 10MHz shows an SFDR of

57dBc. This may be improved by pulling additional DC bias

current (IB) out of the output stage through the optional RB

resistor to ground (the output midpoint is at 2.5V for Figure 3).

Adjusting IB gives the improvement in SFDR shown in Figure 4.

SFDR improvement is achieved for IB values up to 5mA, with

worse performance for higher values.

FIGURE 4. SFDR versus IB.

HIGH-PERFORMANCE DAC TRANSIMPEDANCE

AMPLIFIER

High-frequency DDS Digital-to-Analog Converters (DACs)

require a low distortion output amplifier to retain their

SFDR performance into real-world loads. See Figure 5

for a single-ended output drive implementation. In this

circuit, only one side of the complementary output drive

signal is used. The diagram shows the signal output

current connected into the virtual ground summing junc-

tion of the OPA690, which is set up as a transimpedance

stage or “I-V converter”. The unused current output of the

DAC is connected to ground. If the DAC requires its

outputs terminated to a compliance voltage other than

ground for operation, the appropriate voltage level may

be applied to the noninverting input of the OPA690. The

FIGURE 3. Single-Supply ADC Input Driver.

OPA690

402

Ω

402

Ω

1Vp-p

698

Ω

698

Ω

+5V

DIS

0.1

µF

Ω

50pF

0.1

µF

2.5V DC

±1V AC

ADC Input

Power-Supply Decoupling Not Shown

Output Pull-Down Current (mA)

O = 2Vp-p, 10MHz

OPA690IDBVT Datasheet(PDF) 12 Page - Texas Instruments

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