OPA690IDBVT datasheet(16/22 Pages) TI

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OPA690

SBOS223A

www.ti.com

The minimum specified output voltage and current specifica-

tions over temperature are set by worst-case simulations at

the cold temperature extreme. Only at cold startup will the

output current and voltage decrease to the numbers shown

in the tested tables. As the output transistors deliver power,

their junction temperatures will increase, decreasing their

VBE’s (increasing the available output voltage swing) and

increasing their current gains (increasing the available out-

put current). In steady-state operation, the available output

voltage and current will always be greater than that shown in

the over-temperature specifications since the output stage

junction temperatures will be higher than the minimum speci-

fied operating ambient.

To protect the output stage from accidental shorts to ground

and the power supplies, output short-circuit protection is

included in the OPA690. The circuit acts to limit the maxi-

mum source or sink current to approximately 250mA.

DRIVING CAPACITIVE LOADS

One of the most demanding and yet very common load

conditions for an op amp is capacitive loading. Often, the

capacitive load is the input of an ADC—including additional

external capacitance which may be recommended to im-

prove ADC linearity. A high-speed, high open-loop gain

amplifier like the OPA690 can be very susceptible to de-

creased stability and closed-loop response peaking when a

capacitive load is placed directly on the output pin. When the

amplifier’s open-loop output resistance is considered, this

capacitive load introduces an additional pole in the signal

path that can decrease the phase margin. Several external

solutions to this problem have been suggested. When the

primary considerations are frequency response flatness,

pulse response fidelity, and/or distortion, the simplest and

most effective solution is to isolate the capacitive load from

the feedback loop by inserting a series isolation resistor

between the amplifier output and the capacitive load. This

does not eliminate the pole from the loop response, but

rather shifts it and adds a zero at a higher frequency. The

additional zero acts to cancel the phase lag from the capaci-

tive load pole, thus increasing the phase margin and improv-

ing stability.

The Typical Characteristics show the recommended RS

versus capacitive load and the resulting frequency response

at the load. Parasitic capacitive loads greater than 2pF can

begin to degrade the performance of the OPA690. Long PC

board traces, unmatched cables, and connections to multiple

devices can easily exceed this value. Always consider this

effect carefully, and add the recommended series resistor as

close as possible to the OPA690 output pin (see Board

Layout Guidelines).

The criterion for setting this RS resistor is a maximum

bandwidth, flat frequency response at the load. For the

OPA690 operating in a gain of +2, the frequency response

at the output pin is already slightly peaked without the

capacitive load requiring relatively high values of RS to flatten

the response at the load. Increasing the noise gain will

reduce the peaking as described previously. The circuit of

Figure 9 demonstrates this technique, allowing lower values

of RS to be used for a given capacitive load.

OPA690

402

Ω

175

Ω

402

Ω

+5V

Ω

–5V

Power-supply decoupling not shown.

FIGURE 9. Capacitive Load Driving with Noise Gain Tuning.

FIGURE 10. Required RS vs Noise Gain.

100

Capacitive Load (pF)

100

1000

NG = 2

NG = 3

NG = 4

This gain of +2 circuit includes a noise gain tuning resistor

across the two inputs to increase the noise gain, increasing the

unloaded phase margin for the op amp. Although this tech-

nique will reduce the required RS resistor for a given capacitive

load, it does increase the noise at the output. It also will

decrease the loop gain, slightly decreasing the distortion per-

formance. If, however, the dominant distortion mechanism

arises from a high RS value, significant dynamic range im-

provement can be achieved using this technique. Figure 10

shows the required RS versus CLOAD parametric on noise gain

using this technique. This is the circuit of Figure 9 with RNG

adjusted to increase the noise gain (increasing the phase

margin) then sweeping CLOAD and finding the required RS to

get a flat frequency response. This plot also gives the required

RS versus CLOAD for the OPA690 operated at higher signal

gains.

DISTORTION PERFORMANCE

The OPA690 provides good distortion performance into

a 100

Ω load on ±5V supplies. Relative to alternative solu-

tions, it provides exceptional performance into lighter loads

and/or operating on a single +5V supply. Generally, until the

fundamental signal reaches very high frequency or power

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