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EMC1183 Datasheet(PDF) 20 Page - Microchip Technology |
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EMC1183 Datasheet(HTML) 20 Page - Microchip Technology |
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20 / 48 page ![]() Triple Channel 1°C Temperature Sensor with Beta Compensation and 1.8V SMBus Communications Datasheet Revision 1.0 (07-11-13) 20 SMSC EMC1183 DATASHEET asserted, it will remain asserted until all measured temperatures drop below the Therm Limit minus the Therm Hysteresis (also programmable). When the THERM pin is asserted, the THERM status bits will likewise be set. Reading these bits will not clear them until the THERM pin is deasserted. Once the THERM pin is deasserted, the THERM status bits will be automatically cleared. 5.4.1 THERM Pin Considerations Because of the decode method used to determine the SMBus Address, it is important that the pull-up resistance on THERM pin be within ±10% tolerance. Additionally, the pull-up resistor on the THERM pin must be connected to the same 3.3V supply that drives the VDD pin. For 15ms after power up, the THERM pin must not be pulled low or the SMBus Address will not be decoded properly. If the system requirements do not permit these conditions, the THERM pin must be isolated from the bus during this time. One method of isolating this pin is shown in Figure 5.2. . 5.5 ALERT / THERM2 Output The ALERT / THERM2 pin is an open drain output and requires a pull-up resistor to VDD and has two modes of operation: interrupt mode and comparator mode. The mode of the ALERT / THERM2 output is selected via the ALERT / COMPALERT/THERM bit in the Configuration Register (see Section 6.4). 5.5.1 ALERT / THERM2 Pin InterruptALERT Mode When configured to operate in interrupt mode, the ALERT / THERM2 pin asserts low when an out of limit measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected, functioning as any standard ALERT in on the SMBus. The ALERT / THERM2 pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT / THERM2 pin will remain asserted until the appropriate status bits are cleared. The ALERT/ THERM2 pin can be masked by setting the MASK_ALL bit. Once the ALERT / THERM2 pin has been masked, it will be de-asserted and remain de-asserted until the MASK_ALL bit is cleared by the user. Any interrupt conditions that occur while the ALERT / THERM2 pin is masked will update the Status Register normally. There are also individual channel masks (see Section 6.11). The ALERT / THERM2 pin is used as an interrupt signal or as an SMBus Alert signal that allows an SMBus slave to communicate an error condition to the master. One or more ALERT / THERM2 outputs can be hard-wired together. Figure 5.2 Isolating THERM Pin EMC1183 10 9 8 7 SMDATA SMCLK 1 2 3 4 ALERT VDD DP1 DN1 THERM / ADDR GND +3.3V Shared THERM 22 K 4.7K - 33 K +2.5 - 5V 5 6 DP2 DN2 |
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