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ML7066 Datasheet(PDF) 23 Page - LAPIS Semiconductor Co., Ltd. |
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ML7066 Datasheet(HTML) 23 Page - LAPIS Semiconductor Co., Ltd. |
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23 / 29 page ![]() FEDL7066-01 ML7066 23/29 Power ON and Power Down Characteristics (Operation power supply voltage: 2.1V - 3.6V, Ta=—25 - +65°C) Item Symbol Condition Min. Typ. Max. Unit Power-on time difference TPWON At power on between VDDIO - VREG_IN pins — 1 5 ms Power-off time difference TPWOFF At power off between VDDIO - VREG_IN pins — 1 5 ms (Notes) No specification for the power-on order. However, each reset time after power on regulated by the RESETN pin must be satisfied. Timings are measured at the 20% and 80% levels of the minimum value of the power supply voltage of each power supply pin. Regulator Characteristics (Operation power supply voltage: 2.1V - 3.6V, Ta=—25 - +65°C) Item Symbol Condition Min. Typ. Max. Unit Regulator power-on output response time TREGON At power on VREG_OUT pin — 5 10 µs Regulator power-off output response time TREGOFF At power off VREG_OUT pin — 5 10 µs Regulator voltage input time TREGIN — 5 - - ms (Notes) TREGON is the time from when the VREG_IN pin reaches 2.2V to when the 2.1V voltage is output from the VREG_OUT pin at power-on. TREGOFF is the time from when the VREG_IN pin reaches 2.2V to when the output level of the VREG_OUT pin begins falling at power-off. Any required voltage output from the regulator should not be used after this time elapsed. TREGIN is the rise time (0V →VDD level) of the voltage applied to the VREG_IN pin at power-on. |
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