Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

XRT8001IP Datasheet(PDF) 31 Page - Exar Corporation

Part # XRT8001IP
Description  WAN Clock for T1 and E1 Systems
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT8001IP Datasheet(HTML) 31 Page - Exar Corporation

Back Button XRT8001IP Datasheet HTML 27Page - Exar Corporation XRT8001IP Datasheet HTML 28Page - Exar Corporation XRT8001IP Datasheet HTML 29Page - Exar Corporation XRT8001IP Datasheet HTML 30Page - Exar Corporation XRT8001IP Datasheet HTML 31Page - Exar Corporation XRT8001IP Datasheet HTML 32Page - Exar Corporation XRT8001IP Datasheet HTML 33Page - Exar Corporation XRT8001IP Datasheet HTML 34Page - Exar Corporation XRT8001IP Datasheet HTML 35Page - Exar Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 31 / 48 page
background image
XRT8001
31
Rev. 1.01
6.9 Configuring the XRT8001 WAN Clock into the
“Forward/Slave” Mode.
The user can configure the XRT8001 WAN Clock to
operate in the “Forward/Slave Mode” by executing the
following steps:
Step 1 – Configure the XRT8001 to operate in the
“SLAVE” Mode by pulling the MSB input pin (pin 8) to
GND.
Step 2 – Refer to Table 2B and write the value that
corresponds to the desired "Forward/Slave" Mode into
Bits D[4:1] within Command Register CR0.
Step 3 – Define the values for L, for the CLK1 output
by writing the appropriate value into the CR2 register.
This is achieved by writing the value “L – 1” into this
register.
Notes:
1.
For example, if the user writes “00000” into this regis-
ter, then the XRT8001 device will output a 64kHz
signal via the CLK1 output pin.
2.
If the user intends to output data via CLK1, then he/she
must ensure that the PL1EN bit-field within Command
Register CR0 is set to “1”.
Figure 18. Illustration of the XRT8001 WAN Clock operating in the
“Forward/Slave" Mode
Step 4- Define the value for L, for the CLK2 output
by writing the appropriate value into the CR3 regis-
ter. This is achieved by writing the value “L – 1”
into this register.
Note: If the user intends to output data via CLK2, then he/
she must ensure that the PL2EN bit-field within Command
Register CR1 is set to “1”.
Step 5 – Set the CLK1EN and CLK2EN bit-fields,
within Command Register CR4 to 1 in order to
enable the output drivers for CLK1 and CLK2, as
illustrated below.
XRT8001
WAN Clock
FIN
CLK1
CLK2
8kHz
L x 56kHz
to
L x 64kHz
1 < L < 32
L x 56kHz
to
L x 64kHz
1 < L < 32
Command Register CR4
D4
D3
D2
D1
D0
SYNCEN
CLK1EN
CLK2EN
X
X
x
1
1
0
0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com