HTS221TR datasheet(15/33 Pages) STMICROELECTRONICS

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HTS221

Digital interfaces

5.1.1

I²C operation

The transaction on the bus is started through a START (ST) signal. A start condition is

defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After

this has been transmitted by the master, the bus is considered busy. The next byte of data

transmitted after the start condition contains the address of the slave in the first 7 bits and

the eighth bit tells whether the master is receiving data from the slave or transmitting data to

the slave. When an address is sent, each device in the system compares the first seven bits

after a start condition with its address. If they match, the device considers itself addressed

by the master.

The 8-bit slave address (SAD) associated to the HTS221 humidity sensor is BEh (write) and

BFh (read).

Data transfer with acknowledge is mandatory. The transmitter must release the SDA line

during the acknowledge pulse. The receiver must then pull the data line LOW so that it

remains stable low during the HIGH period of the acknowledge clock pulse. A receiver

which has been addressed is obliged to generate an acknowledge after each byte of data

received.

The I²C embedded in the HTS221 behaves like a slave device and the following protocol

must be adhered to. After the start condition (ST) a slave address is sent, once a slave

acknowledge (SAK) has been returned, an 8-bit sub-address (SUB) will be transmitted: the

7 LSB represents the actual register address while the MSB enables address auto-

increment. If the MSB of the SUB field is ‘1’, the SUB (register address) will be automatically

increased to allow multiple data read/write.

The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated

START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (Write)

the master will transmit to the slave with direction unchanged. Table 10 explains how the

SAD + read/write bit pattern is composed, listing all the possible configurations.

Table 10. SAD + Read/Write patterns

Command

SAD[6:0]

R/W

SAD+R/W

Read

1011111

10111111 (BFh)

Write

1011111

10111110 (BEh)

Table 11. Transfer when master is writing one byte to slave

Master

SAD + W

SUB

DATA

Slave

SAK

Table 12. Transfer when master is writing multiple bytes to slave

Master

SAD + W

SUB

DATA

Slave

SAK

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