DAC8541

SLAS353 − DECEMBER 2001

17

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THEORY OF OPERATION

analog and digital supplies

characteristics section.

APPLICATION INFORMATION

host processor interfacing

DAC8541 to MSP430 microcontroller

Figure 32 shows a typical parallel interface connection between the DAC8541 and a MSP430 microcontroller.

The setup for the interface shown uses ports 4 and 5 of the MSP430 to send or receive the 16-bit data while

bits 0−7 of port 2 provides the control signals for the DAC. When data is to be transmitted to the DAC8541, the

data is made available to the DAC via P4 and P5 and P2.1 is taken low. The MSP430 then toggles P2.0 from

high-to-low and back to high, transferring the 16-bit data to the DAC. This data is loaded into the DAC register

by applying a rising edge to P2.4. The remaining five I/O signals of P2 shown in the figure control the reset,

power-down, and data format functions of the DAC. Depending on the specific requirements of a given

8 Bits

8 Bits

16 Bits

D[15:0]

CS

R/W

RST

RSTSEL

LDAC

PD0

PD1

BTC/USB

VREFL

DGND

AVDD

DVDD

VOUTSENSE

VOUT

VREFH

AGND

(Other Connections Omitted for Clarity)

0.1

µF

1 to 10

µF

0.1

µF

10

µF

0.1

µF

10

µF

AVDD

DVDD

VOUT

VREF

P4[0:7]

P5[0:7]

P2:0

P2:1

P2:2

P2:3

P2:4

P2:5

P2:6

P2:7

MSP430F149

DAC8541

Figure 32. DAC8541 to MSP430 Microcontroller

DAC8541 to TMS320C5402 DSP

Figure 33 shows the connections between the DAC8541 and the TMS320C5402 digital signal processor. Data

is provided via the parallel data bus of the DSP while the DAC’s CS control input is derived from the decoded

I/O strobe signal. The IOSTRB in addition to the R/W and XF(I/O) signals control the data transmission to and

from the DAC as well as the LDAC control. With additional decoding, multiple DAC8541’s can be connected

to the same parallel data bus of the DSP.