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ADGS1412BCPZ Datasheet(PDF) 8 Page - Analog Devices

Part # ADGS1412BCPZ
Description  Serially Controlled, 1.5 廓, On-Resistance, High Voltage, iCMOS, Quad SPST Switch
PDF  26 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADGS1412BCPZ Datasheet(HTML) 8 Page - Analog Devices

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Data Sheet
ADGS1412
Rev. 0 | Page 7 of 25
Parameter
+25°C
−40°C to +85°C
−40°C to +125°C
Unit
Test Conditions/Comments
POWER REQUIREMENTS
VDD = 13.2 V
IDD
0.001
µA typ
All switches open
1.0
µA max
220
µA typ
All switches closed, VL = 5.5 V
380
µA max
250
µA typ
All switches closed, VL = 2.7 V
430
µA max
IL
Inactive
6.3
µA typ
Digital inputs = 0 V or VL
8.0
µA max
Active at 50 MHz
1.8
mA typ
Digital inputs toggle between
0 V and VL, VL = 5.5 V
2.1
mA max
0.7
mA typ
Digital inputs toggle between
0 V and VL, VL = 2.7 V
1.0
mA max
VDD
5/20
V min/V max
GND = 0 V, VSS = 0 V
1
Guaranteed by design; not subject to production test.
CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx
Table 4. Four Channels On
Parameter
25°C
85°C
125°C
Unit
CONTINUOUS CURRENT, Sx OR Dx1
VDD = 15 V, VSS = −15 V (θJA = 54°C/W)
297
165
79
mA maximum
VDD = 12 V, VSS = 0 V (θJA = 54°C/W)
240
142
74
mA maximum
VDD = 5 V, VSS = −5 V (θJA = 54°C/W
224
135
72
mA maximum
1
Sx refers to the S1 to S4 pins, and Dx refers to the D1 to D4 pins.
Table 5. One Channel On
Parameter
25°C
85°C
125°C
Unit
CONTINUOUS CURRENT, Sx OR Dx1
VDD = 15 V, VSS = −15 V (θJA = 54°C/W)
531
225
87
mA maximum
VDD = 12 V, VSS = 0 V (θJA = 54°C/W)
433
210
85
mA maximum
VDD = 5 V, VSS = −5 V (θJA = 54°C/W
404
202
84
mA maximum
1
Sx refers to the S1 to S4 pins, and Dx refers to the D1 to D4 pins.
TIMING CHARACTERISTICS
VL = 2.7 V to 5.5 V, GND = 0 V, and all specifications TMIN to TMAX, unless otherwise noted. Guaranteed by design and characterization,
not production tested.
Table 6.
Parameter
Limit
Unit
Test Conditions/Comments
TIMING CHARACTRISTICS
t1
20
ns min
SCLK period
t2
8
ns min
SCLK high pulse width
t3
8
ns min
SCLK low pulse width
t4
10
ns min
CS falling edge to SCLK active edge
t5
6
ns min
Data setup time
t6
8
ns min
Data hold time



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