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FPD87310 Datasheet(PDF) 10 Page - National Semiconductor (TI) |
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FPD87310 Datasheet(HTML) 10 Page - National Semiconductor (TI) |
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10 / 28 page ![]() Functional Description (Continued) • Each output has a Control Register (bit [0]) which defines the GPO polarity (active high or low). Another bit in the Control Register (bit [1] enables the “toggle” mode. This mode is useful in REV generation when alternating polar- ity is required from line to line. Frame to Frame polarity changes are made by programming an odd # in the ver- tical duration register when in “toggle” mode. Two of the General Purpose Outputs have additional capa- bilities. GPO[0] is capable of performing line inversion on the output data. Bits [4,3] of the Output Format Control Register pro- vides control for this function. GPO[9] controls output blanking and must be used for this purpose. If output blanking is not desired, this register must be programmed to always be active. Black or White Data Generation (all “0” or “1” data) at the end of each frame is generated when Input Format Control Reg- ister bits [7,6] is set “10” or “11”. When those bits are set, Black or White data is output after line #768 if GPO[9] is ac- tive. SERIAL EEPROM INTERFACE The Serial EEPROM Interface controls the FPD87310 initial- ization. If the first byte word read from the EEPROM is not “00”, the internal default values are used to initialize all pro- grammable function of the FPD87310. At power-up, the FPD87310 configures the internal program- mable registers with data from the EEPROM. After the FPD87310 is initialized, the EEPROM can be accessed by the system in which display configuration and manufacturing information can be obtained. The EEPROM can be pro- grammed “in system” providing quick evaluation of different display timing. External access to the EEPROM must be pre- ceded by pin TEST[2] = “1” in order to interrupt the FPD87310 download. Continuous initialization with EEPROM is also selectable by pin TEST[2] = “0”. The FPD87310 initialization data begins at EEPROM ad- dress 080 H. The first 128 bytes (00H–07FH) are reserved for display identification data. RSDS OUTPUT VOLTAGE CONTROL The RSDS output voltage swing is controlled through an ex- ternal load resistor connected to the R PI pin. Typical value for the R PI is 13kΩ for most applications. However, this is de- pendent on overall LCD module design characteristics such as trace impedance, termination, etc. The RSDS output volt- age is inversely related to the R PI value. Lower RPI values will increase the RSDS output voltage swing and conse- quently overall power consumption will also increase. See . Figure 13 DS101077-4 FIGURE 11. EEPROM Connection DS101077-5 FIGURE 12. Without EEPROM DS101077-35 FIGURE 13. R PI Connection Diagram www.national.com 10 |
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