Programmable Registers

At power-up, data is read from an external EEPROM. If anything other than 00H is read back on the first EEPROM access (in-

dicating EEPROM not present), the internal default values are used.

Pull-Up must be used on EE_SD pin if external EEPROM is not used.

The following parameters are initialized at power up.

TABLE 1. FPD87310 Programmable Register Definition

Control

Registers

EEPROM

Address

The CONTROL REGISTER provide more setting information to the

input and output interfaces.

Output Format

Control

(16 bits)

082

[2:0]

Reserved

[3]

Output Data Inversion

“0” - Data inversion is Disabled

“1” - Data inversion is Enabled

[4]

Output Data Inversion/Polarity

“0” - Data Inversion when GPO[0] is “0”

“1” - Data inversion when GPO[0] is “1”

[7:5]

Reserved

[11:8]

RSDS output setup/hold time control

[13:12]

Unused Pixels

“00” - no unconnected pixels at beginning of first CD

“01” - 1 unconnected pixels at beginning of first CD

“10” - 2 unconnected pixels at beginning of first CD

“11” - 3 unconnected pixels at beginning of first CD

[15:14]

Reserved

Input Format

Control

(8 bits)

085

H

[1:0]

Reserved

[2]

Reserved

[3]

Frame Rate Control (8 bits only)

“0” - Enable Frame Rate Control

“1” - Disable Frame Rate Control (Truncate LSBs)

[4]

8/6 Bits Video

“0” - 6 Bits Video

“1” - 8 Bits Video

[5]

Reserved

[7:6]

Black or White data Generation

“00” - No data manipulation is performed

“10” - Data goes to “0” when GPO[9] is “0”

“11” - Data goes to “1” when GPO[9] is “0”

Horizontal

Backporch

(11 bits)

087

# of 65 MHz clocks after the falling edge of HYSYNC until start of video.

Vertical

Backporch

(11 bits)

089

# of HSYNC from VSYNC falling edge until start of video.

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