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STL4LN80K5 Datasheet(PDF) 4 Page - STMicroelectronics

Part # STL4LN80K5
Description  N-channel 800 V, 2.1 Ω typ., 3 A MDmesh™K5 Power MOSFET in a PowerFLAT™5x6 VHV package
PDF  14 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STL4LN80K5 Datasheet(HTML) 4 Page - STMicroelectronics

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Electrical characteristics
STL4LN80K5
4/14
DocID027815 Rev 1
2
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V(BR)DSS
Drain-source breakdown voltage
VGS = 0 V, ID = 1 mA
800
V
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 800 V
1
µA
VGS = 0 V, VDS = 800 V
TC = 125 °C
50
µA
IGSS
Gate body leakage current
VDS = 0 V, VGS = ±20 V
±10
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 100 µA
3
4
5
V
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 1.2 A
2.1
2.6
Ω
Table 6: Dynamic
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Ciss
Input capacitance
VDS = 100 V, f = 1 MHz, VGS = 0 V
-
110
-
pF
Coss
Output capacitance
-
9.5
-
pF
Crss
Reverse transfer
capacitance
-
0.4
-
pF
Coss(eq)
(1)
Equivalent output
capacitance
VDS = 0 to 640 V, VGS = 0 V
-
TBD
-
pF
Rg
Intrinsic gate
resistance
f = 1 MHz, ID = 0 A
-
18
-
Ω
Qg
Total gate charge
VDD = 640 V, ID = 2 A
VGS= 10 V,
see Figure 3: "Gate charge test
circuit"
-
4
-
nC
Qgs
Gate-source charge
-
TBD
-
nC
Qgd
Gate-drain charge
-
TBD
-
nC
Notes:
(1)
Coss eq is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7: Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on
delay time
VDD= 400 V, ID = 1.6 A, RG = 4.7 Ω
VGS = 10 V
(See Figure 2: "Switching times test circuit
for resistive load"and Figure 7: "Switching
time waveform")
-
TBD
-
ns
tr
Rise time
-
TBD
-
ns
td(off)
Turn-off
delay time
-
TBD
-
ns
tf
Fall time
-
TBD
-
ns



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