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PC87311AVF Datasheet(PDF) 26 Page - National Semiconductor (TI) |
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PC87311AVF Datasheet(HTML) 26 Page - National Semiconductor (TI) |
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26 / 78 page  40 FDC Command Set Description (Continued) READ ID Command Phase 0 MFM 0 0 1 0 1 0 X X XXXHDDR1 DR0 Execution Phase Controller reads first ID Field header bytes it can find and reports these bytes to the system in the result bytes Result Phase Status Register 0 Status Register 1 Status Register 2 Track Number Head Number Sector Number Bytes per Sector READ A TRACK Command Phase 0 MFM 0 0 0 0 1 0 IPS X X X X HD DR1 DR0 Track Number Drive Head Number Sector Number Bytes per Sector End of Track Sector Number Intersector Gap Length Data Length Execution Phase Data read from disk drive is transferred to system via DMA or non-DMA modes Result Phase Status Register 0 Status Register 1 Status Register 2 Track Number Head Number Sector Number Bytes per Sector RECALIBRATE Command Phase 000001 1 1 000000DR1 DR0 Execution Phase Disk drive head is stepped out to Track 0 No Result Phase RELATIVE SEEK Command Phase 1 DIR 0 0 1 1 1 1 X X X X X HD DR1 DR0 Relative Track Number Execution Phase Disk drive head stepped in or out a pro- grammable number of tracks No Result Phase SCAN EQUAL Command Phase MT MFM SK 1 0 0 0 1 IPS X X X X HD DR1 DR0 Track Number Drive Head Number Sector Number Bytes per Sector End of Track Sector Number Intersector Gap Length Sector Step Size Execution Phase Data transferred from system to control- ler is compared to data read from disk Result Phase Status Register 0 Status Register 1 Status Register 2 Track Number Head Number Sector Number Bytes per Sector SCAN HIGH OR EQUAL Command Phase MT MFM SK 1 1 1 0 1 IPS X X X X HD DR1 DR0 Track Number Drive Head Number Sector Number Bytes per Sector End of Track Sector Number Intersector Gap Length Sector Step Size Execution Phase Data transferred from system to control- ler is compared to data read from disk 26 |
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