ST72325AR7-Auto datasheet(174/243 Pages) STMICROELECTRONICS

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I2C bus interface (I2C)

ST72325xxx-Auto

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Doc ID 13770 Rev 3

16.7.7

I2C own address register (OAR2)

Table 89.

OAR1 register description

Bit

Name

Function

7-bit addressing mode

10-bit addressing mode

7:1

ADD[7:1]

Interface address

These bits define the I2C bus address

of the interface. They are not cleared

when the interface is disabled

(PE = 0).

Not applicable

ADD0

Address direction bit

This bit is ‘don’t care’, the interface

acknowledges either 0 or 1. It is not

cleared when the interface is disabled

(PE = 0).

Address 01h is always ignored.

7:0

ADD[7:0]

Not applicable

Interface address

These are the least significant bits of

the I2C bus address of the interface.

They are not cleared when the

interface is disabled (PE = 0).

OAR2

Reset value: 0100 0000 (40h)

543

FR[1:0]

Reserved

ADD[9:8]

Reserved

Table 90.

OAR2 register description

Bit

Name

Function

7:6

FR[1:0]

Frequency bits

These bits are set by software only when the interface is disabled (PE = 0). To

configure the interface to I2C specified delays, select the value corresponding to

the CPU frequency fCPU.

00:

fCPU < 6 MHz

01:

fCPU = 6 to 8 MHz

5:3

Reserved

2:1

ADD[9:8]

Interface address

These are the most significant bits of the I2C bus address of the interface (10-bit

mode only). They are not cleared when the interface is disabled (PE = 0).

Reserved

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