STM32L496QGI3STR datasheet(144/263 Pages) STMICROELECTRONICS

144 / 263 page

Electrical characteristics

STM32L496xx

144/263

DocID029173 Rev 2

AHB

RNG independent clock domain

2.20

µA/MHz

RNG AHB clock domain

0.51

SRAM1

2.80

2.29

2.50

SRAM2

1.20

1.00

TSC

1.50

1.17

1.00

All AHB Peripherals

121.00

79.10

87.20

APB1

AHB to APB1 bridge(3)

0.90

0.70

0.90

µA/MHz

CAN1

3.68

3.04

3.50

DAC1

3.20

2.70

3.00

I2C1 independent clock domain

3.80

3.20

3.30

I2C1 APB clock domain

1.00

0.79

1.00

I2C2 independent clock domain

3.41

2.83

3.00

I2C2 APB clock domain

0.98

0.79

1.00

I2C3 independent clock domain

2.89

2.38

2.50

I2C3 APB clock domain

0.98

0.83

1.00

I2C4 independent clock domain

3.41

2.83

3.00

I2C4 APB clock domain

0.98

0.79

1.00

LCD

1.03

0.80

1.03

LPUART1 independent clock domain

2.40

2.00

2.20

LPUART1 APB clock domain

0.98

0.83

0.80

LPTIM1 independent clock domain

3.10

2.54

LPTIM1 APB clock domain

0.88

0.75

0.90

LPTIM2 independent clock domain

2.86

2.42

2.25

LPTIM2 APB clock domain

0.90

0.67

0.75

OPAMP

0.29

0.20

0.30

PWR

0.80

0.63

0.60

SPI2

1.78

1.50

SPI3

1.76

1.50

SWPMI1 independent clock domain

2.10

1.50

2.00

SWPMI1 APB clock domain

1.00

0.79

0.75

Table 50. Peripheral current consumption (continued)

Peripheral

Range 1

Range 2

Low-power run

and sleep

Unit

STM32L496QGI3STR Datasheet(PDF) 144 Page - STMicroelectronics

STM32L496QGI3STR Datasheet(HTML) 144 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL