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HT69F240 Datasheet(PDF) 40 Page - Holtek Semiconductor Inc |
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HT69F240 Datasheet(HTML) 40 Page - Holtek Semiconductor Inc |
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40 / 172 page ![]() Rev. 1.20 40 �a��� 2�� 201� Rev. 1.20 41 �a��� 2�� 201� HT69F240 I/O 8-Bit Flash MCU with LED/LCD Driver HT69F240 I/O 8-Bit Flash MCU with LED/LCD Driver bit0 WRF:WDTControlregistersoftwareresetflag 0:Notoccurred 1:Occurred Thisbitissetto1bytheWDTControlregistersoftwareresetandclearedbythe applicationprogram.Notethatthisbitcanonlybeclearedto0bytheapplication program. Fast Wake-up TominimisepowerconsumptionthedevicecanentertheSLEEPorIDLE0Mode,wherethesystem clocksourcetothedevicewillbestopped.Howeverwhenthedeviceiswokenupagain,itcantake aconsiderabletimefortheoriginalsystemoscillatortorestart,stabilizeandallownormaloperation toresume.ToensurethedeviceisupandrunningasfastaspossibleaFastWake-upfunctionis provided,whichallowsfSUB,namelytheLIRCoscillator,toactasatemporaryclocktofirstdrivethe systemuntiltheoriginalsystemoscillatorhasstabilised.AstheclocksourcefortheFastWake-up functionisfSUB,theFastWake-upfunctionisonlyavailableintheSLEEP1andIDLE0modes. WhenthedeviceiswokenupfromtheSLEEP0mode,theFastWake-upfunctionhasnoeffect becausethefSUBclockisstopped.TheFastWake-upenable/disablefunctioniscontrolledusingthe FSTENbitintheSMODregister. IftheHXToscillatorisselectedastheNORMALModesystemclockandiftheFastWake-up functionisenabled,thenitwilltakeonetotwotSUBclockcyclesoftheLIRCoscillatorforthe systemtowake-up.ThesystemwilltheninitiallyrununderthefSUBclocksourceuntil1024HXT clockcycleshaveelapsed,atwhichpointtheHTOflagwillswitchhighandthesystemwillswitch overtooperatingfromtheHXToscillator. IftheHIRCorLIRCoscillatorisusedasthesystemoscillator,thenitwilltake15~16clockcycles oftheERC/HIRCoscillatoror1~2clockcyclesoftheLIRCosrillatorrespectivelytowakeupthe systemfromtheSLEEPorIDLE0Mode.TheFastWake-upbit,FSTENwillhavenoeffectinthese cases. System Oscillator FSTEN Bit Wake-up Time (SLEEP0 Mode) Wake-up Time (SLEEP1 Mode) Wake-up Time (IDLE0 Mode) Wake-up Time (IDLE1 Mode) HXT 0 1024 HXT �y�les 1024 HXT �y�les 1~2 HXT �y�les 1 1024 HXT �y�les 1~2 fSUB �y�les (System �uns wit� fSUB first for 1024 HXT �y�les and t�en swit��es ove� to �un wit� t�e HXT �lo�k ) 1~2 HXT �y�les HIRC x 1�~16 HIRC �y�les 1�~16 HIRC �y�les 1~2 HIRC �y�les LIRC x 1~2 LIRC �y�les 1~2 LIRC �y�les 1~2 LIRC �y�les LXT x 1024 LXT �y�les 1024 LXT �y�les 1~2 LXT �y�les Wake-up Times NotethatiftheWatchdogTimerisdisabled,whichmeansthatthefSUBclockdrivedfromtheLXT orLIRCoscillatorisoff,thentherewillbenoFastWake-upfunctionavailablewhenthedevice wakes-upfromtheSLEEP0Mode. |
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