R5F104FDD datasheet(91/213 Pages) RENESAS

91 / 213 page

RL78/G14

2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85

°C)

R01DS0053EJ0330 Rev. 3.30

Page 91 of 208

Aug 12, 2016

(Notes and Caution are listed on the next page, and Remarks are listed on the page after the next page.)

(5)

During communication at same potential (simplified I2C mode)

(TA = -40 to +85°C, 1.6 V

≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

Parameter

Symbol

Conditions

HS (high-speed main)

mode

LS (low-speed main)

mode

LV (low-voltage main)

mode

Unit

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

SCLr clock frequency

fSCL

2.7 V

≤ EVDD0 ≤ 5.5 V,

Cb = 50 pF, Rb = 2.7 k

1000 Note 1

400 Note 1

kHz

1.8 V

≤ EVDD0 ≤ 5.5 V,

Cb = 100 pF, Rb = 3 k

400 Note 1

kHz

1.8 V

≤ EVDD0 < 2.7 V,

Cb = 100 pF, Rb = 5 k

300 Note 1

kHz

1.7 V

≤ EVDD0 < 1.8 V,

Cb = 100 pF, Rb = 5 k

250 Note 1

kHz

1.6 V

≤ EVDD0 < 1.8 V,

Cb = 100 pF, Rb = 5 k

—

250 Note 1

kHz

Hold time

when SCLr = “L”

tLOW

2.7 V

≤ EVDD0 ≤ 5.5 V,

Cb = 50 pF, Rb = 2.7 k

475

1150

1.8 V

≤ EVDD0 ≤ 5.5 V,

Cb = 100 pF, Rb = 3 k

1150

1.8 V

≤ EVDD0 < 2.7 V,

Cb = 100 pF, Rb = 5 k

1550

1.7 V

≤ EVDD0 < 1.8 V,

Cb = 100 pF, Rb = 5 k

1850

1.6 V

≤ EVDD0 < 1.8 V,

Cb = 100 pF, Rb = 5 k

—

1850

Hold time

when SCLr = “H”

tHIGH

2.7 V

≤ EVDD0 ≤ 5.5 V,

Cb = 50 pF, Rb = 2.7 k

475

1150

1.8 V

≤ EVDD0 ≤ 5.5 V,

Cb = 100 pF, Rb = 3 k

1150

1.8 V

≤ EVDD0 < 2.7 V,

Cb = 100 pF, Rb = 5 k

1550

1.7 V

≤ EVDD0 < 1.8 V,

Cb = 100 pF, Rb = 5 k

1850

1.6 V

≤ EVDD0 < 1.8 V,

Cb = 100 pF, Rb = 5 k

—

1850

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