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R5F564MFCDFB Datasheet(PDF) 74 Page - Renesas Technology Corp |
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R5F564MFCDFB Datasheet(HTML) 74 Page - Renesas Technology Corp |
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74 / 228 page  R01DS0173EJ0110 Rev.1.10 Page 74 of 228 Oct 24, 2016 RX64M Group 4. I/O Registers 0008 12C3h ECCRA M ECCRAM 1-Bit Error Status Register ECCRAM1ST S 88 2 ICLK RAM 0008 12C4h ECCRA M ECCRAM Protection Register ECCRAMPR CR 88 2 ICLK RAM 0008 12C8h ECCRA M ECCRAM 2-Bit Error Address Capture Register ECCRAM2EC AD 32 32 2 ICLK RAM 0008 12CCh ECCRA M ECCRAM 1-Bit Error Address Capture Register ECCRAM1EC AD 32 32 2 ICLK RAM 0008 12D0h ECCRA M ECCRAM Protection Register 2 ECCRAMPR CR2 88 2 ICLK RAM 0008 12D4h ECCRA M ECCRAM Test Control Register ECCRAMETS T 88 2 ICLK RAM 0008 1300h BSC Bus Error Status Clear Register BERCLR 88 2 ICLK Buses 0008 1304h BSC Bus Error Monitoring Enable Register BEREN 88 2 ICLK Buses 0008 1308h BSC Bus Error Status Register 1 BERSR1 88 2 ICLK Buses 0008 130Ah BSC Bus Error Status Register 2 BERSR2 16 16 2 ICLK Buses 0008 1310h BSC Bus Priority Control Register BUSPRI 16 16 2 ICLK Buses 0008 2000h DMAC0 DMA Source Address Register DMSAR 32 32 2 ICLK DMACAa 0008 2004h DMAC0 DMA Destination Address Register DMDAR 32 32 2 ICLK DMACAa 0008 2008h DMAC0 DMA Transfer Count Register DMCRA 32 32 2 ICLK DMACAa 0008 200Ch DMAC0 DMA Block Transfer Count Register DMCRB 16 16 2 ICLK DMACAa 0008 2010h DMAC0 DMA Transfer Mode Register DMTMD 16 16 2 ICLK DMACAa 0008 2013h DMAC0 DMA Interrupt Setting Register DMINT 88 2 ICLK DMACAa 0008 2014h DMAC0 DMA Address Mode Register DMAMD 16 16 2 ICLK DMACAa 0008 2018h DMAC0 DMA Offset Register DMOFR 32 32 2 ICLK DMACAa 0008 201Ch DMAC0 DMA Transfer Enable Register DMCNT 88 2 ICLK DMACAa 0008 201Dh DMAC0 DMA Software Start Register DMREQ 88 2 ICLK DMACAa 0008 201Eh DMAC0 DMA Status Register DMSTS 88 2 ICLK DMACAa 0008 201Fh DMAC0 DMA Request Source Flag Control Register DMCSL 88 2 ICLK DMACAa 0008 2040h DMAC1 DMA Source Address Register DMSAR 32 32 2 ICLK DMACAa 0008 2044h DMAC1 DMA Destination Address Register DMDAR 32 32 2 ICLK DMACAa 0008 2048h DMAC1 DMA Transfer Count Register DMCRA 32 32 2 ICLK DMACAa 0008 204Ch DMAC1 DMA Block Transfer Count Register DMCRB 16 16 2 ICLK DMACAa 0008 2050h DMAC1 DMA Transfer Mode Register DMTMD 16 16 2 ICLK DMACAa 0008 2053h DMAC1 DMA Interrupt Setting Register DMINT 88 2 ICLK DMACAa 0008 2054h DMAC1 DMA Address Mode Register DMAMD 16 16 2 ICLK DMACAa 0008 205Ch DMAC1 DMA Transfer Enable Register DMCNT 88 2 ICLK DMACAa 0008 205Dh DMAC1 DMA Software Start Register DMREQ 88 2 ICLK DMACAa 0008 205Eh DMAC1 DMA Status Register DMSTS 88 2 ICLK DMACAa 0008 205Fh DMAC1 DMA Request Source Flag Control Register DMCSL 88 2 ICLK DMACAa 0008 2080h DMAC2 DMA Source Address Register DMSAR 32 32 2 ICLK DMACAa 0008 2084h DMAC2 DMA Destination Address Register DMDAR 32 32 2 ICLK DMACAa 0008 2088h DMAC2 DMA Transfer Count Register DMCRA 32 32 2 ICLK DMACAa 0008 208Ch DMAC2 DMA Block Transfer Count Register DMCRB 16 16 2 ICLK DMACAa 0008 2090h DMAC2 DMA Transfer Mode Register DMTMD 16 16 2 ICLK DMACAa 0008 2093h DMAC2 DMA Interrupt Setting Register DMINT 88 2 ICLK DMACAa 0008 2094h DMAC2 DMA Address Mode Register DMAMD 16 16 2 ICLK DMACAa 0008 209Ch DMAC2 DMA Transfer Enable Register DMCNT 88 2 ICLK DMACAa 0008 209Dh DMAC2 DMA Software Start Register DMREQ 88 2 ICLK DMACAa 0008 209Eh DMAC2 DMA Status Register DMSTS 88 2 ICLK DMACAa 0008 209Fh DMAC2 DMA Request Source Flag Control Register DMCSL 88 2 ICLK DMACAa 0008 20C0h DMAC3 DMA Source Address Register DMSAR 32 32 2 ICLK DMACAa Table 4.1 List of I/O Registers (Address Order) (3 / 67) Address Module Symbol Register Name Register Symbol Number of Bits Access Size Number of Access Cycles Related Function ICLK PCLK ICLK PCLK |
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